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[Bug 1001090] Added option to run system timer with internal clock


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Sergei Gavrikov <sergei.gavrikov@gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |sergei.gavrikov@gmail.com

--- Comment #4 from Sergei Gavrikov <sergei.gavrikov@gmail.com> 2011-01-17 13:17:56 GMT ---
(In reply to comment #3)
> (In reply to comment #2)
> > CYGSEM_HAL_SYSTICK_CLK_INTERNAL is a CDL option to be defined in the variant
> > configuration. Is that ok or shall it be defined in the cortexm CDL?
> 
> I downloaded your parch and produced a CDL bool option into LPC17xx port ( Bug
> 1001114 ). Needles to say, works fine. Of course there is (always) a question
> of flavor: a bool as is now or data - CDL defines CYGARC_REG_SYSTICK_CLK_SRC as
> a choice between Int/Ext (no need for CYGSEM_HAL_SYSTICK_CLK_INTERNAL ).
> 
> Regarding your question: IMO this bit is a part of the Cortex-M architecture
> and it would be good if Cortex-M architecture CDL reflects it.

IMO, yet another solution would be to move the clock management in the variant
HALs and in the architecture HAL to have those famous 'Clock control' macros:

#define HAL_CLOCK_INITIALIZE( _period_ )   hal_clock_initialize( _period_ )
#define HAL_CLOCK_RESET( _vec_, _period_ ) hal_clock_reset( _vec_, _period_ )
#define HAL_CLOCK_READ( _pvalue_ )         hal_clock_read( _pvalue_ )
...

It would be nice to know the opinion of Nick Garnett.

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