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[Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling:wasted processing power
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-bugs at ecos dot sourceware dot org
- Date: Wed, 26 Sep 2012 17:15:15 +0100
- Subject: [Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling:wasted processing power
- Auto-submitted: auto-generated
- References: <bug-1001456-13@http.bugs.ecos.sourceware.org/>
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Phil <pme.neratec@gmx.ch> changed:
What |Removed |Added
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CC| |pme.neratec@gmx.ch
--- Comment #24 from Phil <pme.neratec@gmx.ch> 2012-09-26 17:15:10 BST ---
If the situation is as described by Bernard FouchÃ, this means eCos is not well
suited for Cortex-M3 (e.g. STM32 or LPC17xx) platform!
Why is no eCos proponent reacting on this bug?
When is the NVIC_ClearPendingIRQ function needed, only if this is an external
interrupt that needs to be handled?
@Bernard FouchÃ: In the Cortex-M3 (e.g. STM32 or LPC17xx) the processor
automatically clears the pending bit when it calls the interrupt handler (see
STM32 Programming Manual (CD00228163.pdf) page 128, "A pending interrupt
remains pending until one of the following: The processor enters the ISR for
the interrupt..."). Why do you think this must be done programmatically?
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