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[Bug 1001606] Enable the cache on Kinetis in RAM startup mode
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-bugs at ecos dot sourceware dot org
- Date: Sat, 3 Nov 2012 15:31:19 +0000
- Subject: [Bug 1001606] Enable the cache on Kinetis in RAM startup mode
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Ilija Kocho <email@example.com> changed:
What |Removed |Added
Attachment #1966|0 |1
is obsolete| |
Attachment #1967|0 |1
is obsolete| |
--- Comment #36 from Ilija Kocho <firstname.lastname@example.org> 2012-11-03 15:31:16 GMT ---
Created an attachment (id=1973)
Kinetis variant - separate DCACHE-ICACHE 121103
(In reply to comment #35)
> Finally I reply....
> First of all, to follow up a specific question you asked:
> (In reply to comment #25)
> > (In reply (addendum) to comment #23)
> > > Bus arbitration tweak for copy-back DDRAM 121008
> > >
> > Another consideration: It is possible to swap PC and PS priorities permanently
> > for RAM startup. Then cache control macros will be shorter and there's no risk
> > of preemption.. The drawback, if any, is that crossbar arbitration priorities
> > for DDRAM will be different than the reset default. If implemented, this
> > inversion could be fixed or configurable with CDL.
> > Comments?
> I don't have a very good feel for what the effects of this would be.
> Specifically, can you imagine a situation when someone really would want the PC
> priority to be higher than the PS one? I can't see it making a big difference
> either way in the end, so I'm thinking a permanent change would be ok (although
> if so, why wasn't it the reset default?).
If PC priority is lower there shouldn't be danger of stale since soon after
instruction fetch is pre-empted by data access (from previous instruction), it
will cause the data transfer to seize (previous instruction ends) that will
unblock instruction fetch. Therefore, the set-up where PC has lower priority
than PS looks inherently more stable than the opposite.
However, I assume that it is most probable for users to expect reset-default
priorities upon start-up so I have left them unchanged. Also I can imagine
situation where user has set up PC higher priority then PS - then the
protective macro will be still necessary.
> As for the main patches.... I'm glad that the split cache scheme has made such
> a great improvement in measured performance, as per our private email exchange.
> It shows it was worth the effort!
Indeed. I redid the tests and new results for old scheme are not as low (now I
have used different mirror, but there's still 30% boost.
> One thing that strikes me as odd is the addition of CYG_HAL_STARTUP_DEF_ROM to
> define CYG_HAL_STARTUP_ROM for RAM startup types. This seems potentially risky.
> What problem was it intended to solve?
It shouldn't be there :(. I t is a ghost from my test to use technique from
FLASH start-up [Bug 1001623] - ROM start-up emulation. It was working but
copying initialized data from RAM to RAM makes little sense. Actually this
cdl_option was removed, but somehow re-appeared. Now I have removed (patch
attached) it again and retested everything.
> Other than that, I've reviewed everything already written in this issue, and
> been through the current patches, and I don't see any reason not to commit the
> patches. There might be a few essentially cosmetic things (spelling, typos,
> etc.) that I could change, but minor touch-ups like that can be done after the
> commit rather than going round the loop again.
So now I am going to commit, but I will leave this bug open for a while as a
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