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[Bug 1001815] Freescale DSPI avoid Rx DMA if transfer fits in FIFO.


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http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001815

Ilija Kocho <ilijak@siva.com.mk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|CURRENTRELEASE              |---

--- Comment #5 from Ilija Kocho <ilijak@siva.com.mk> ---
There's a bug that in some circumstances causes erratic behaviour. This is due
to DMA not being disabled when it is not used.

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