--- vectors-prepatch.S	2004-10-28 16:36:01.000000000 +0200
+++ vectors.S	2004-10-28 14:41:20.000000000 +0200
@@ -877,6 +877,8 @@ FIQ:
         ldr     sp,.__FIQ_exception_stack   // get regs saved in FIQ mode
         ldmdb sp,{sp,lr}
         msr     spsr,sp
+        ldr			sp,.__FIQ_exception_stack   // amon:  use the correct interrupt stack
+        b IRQ1
 
         // now it looks like we got an IRQ instead of an FIQ except that
         // FIQ is disabled so we don't recurse.
@@ -884,6 +886,7 @@ IRQ:
         // Note: I use this exception stack while saving the context because
         // the current SP does not seem to be always valid in this CPU mode.
         ldr     sp,.__exception_stack   // get good stack
+IRQ1:
         stmfd   sp!,{r0-r5}             // save some supervisor regs
         sub     r0,lr,#4                // PC at time of interrupt
         mrs     r1,spsr