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Re: CYG_I2C_BITBANG_SDA_OUTPUT


Andrew Lunn wrote:
> Hi Bart
> 
> I've a college who is implementing a BitBang I2C bus driver. He has
> discovered that the documentation is missing something. It does not
> describe the use of CYG_I2C_BITBANG_SDA_OUTPUT. 
> 
> Setting the SDA to an output is clear. However does it have to take
> care of how it is driven, ie High/Low? eg consider the code:
> 
>     // We have read the last bit. SDA is still an input, SCL is low.
>     // We need to switch SDA to an output and send the ack/nak
>     (*banger)(mash, CYG_I2C_BITBANG_SDA_OUTPUT);
>     (*banger)(mash, nak ? CYG_I2C_BITBANG_SDA_HIGH : CYG_I2C_BITBANG_SDA_LOW);
> 
> If the last driven state of SDA was high, and nak is false, it could
> be that the call for CYG_I2C_BITBANG_SDA_OUTPUT sets SDA to high, and
> then the next statement puts it low again, causing a short spike. Is
> this a problem? Should it first read the current state of SDA, set the
> drive level and then flip it to an output?

I'm not speaking in any official capacity wrt the I2C code, but:

Normally, one would set the state of the bit before making
it an output.  Most hardware will latch the value and it
simply has no effect until the output drivers are enabled.
So, I'd reverse the above statements.

-- 
------------------------------------------------------------
Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
------------------------------------------------------------


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