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Re: NAND technical review

Jürgen Lambrecht wrote:
Ross Younger wrote:
Now, I mentioned ECC data. NAND technology has a number of underlying
limitations, importantly that it has reliability issues. I don't have a full
picture - the manufacturers seem to be understandably coy - but my
understanding is that on each page, a driver ought to be able to cope with a
single bit having flipped either on programming or on reading. The

Such a "broken bit" is because the transistor that contains the bit is physically broken, and is stuck at 1 or at 0 (I don't know if it can be both). So you cannot anymore erase it (flip it back to 1) or program it (flip to 0).

I thought only programming or erasing could break it, not reading?
Is somebody sure about this?

I've had experience of dodgy flash that spontaneously started getting bit errors either over time or on reads - couldn't tell which. Really it was NOR, rather than NAND, but that should be /more/ reliable! I think it's probably best to assume that if it's hardware, it can go wrong :-).

[ NB I'll be replying to other mails in this thread tomorrow, but it's a bit late here at the moment for me to start ]

--["No sense being pessimistic, it wouldn't work anyway"]-- Opinions==mine

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