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Thread stack alignment requirements for ARM
- From: Michael Bergandi <mbergandi at gmail dot com>
- To: eCos Developer List <ecos-devel at ecos dot sourceware dot org>
- Date: Wed, 22 Jun 2011 22:37:24 -0400
- Subject: Thread stack alignment requirements for ARM
I am hoping that someone can share some knowledge on thread stack
alignment requirements for ARM targets and how eCos is handling it.
According to the ARM site, they say that stacks should be 16 byte
aligned. Then, they go on to say that there are a couple ways that
stack alignment requirement can be managed. One of which was if you
are running on an OS and the OS has taken steps to ensure the
requirement is met, then the application need not worry about it. I
don't think I fully understand what this means exactly.
Our particular target is the mx27 (ARM9). Out of habit, we make all
the memory for the thread stacks in our applications 4 byte aligned.
Is this enough? Is it really necessary?
I have found some packages in the kernel (specifically, bsd_tcpip)
that has thread stack memory allocated with no alignment attribute
set. This got me wondering how this all works.
I would love to here from someone with a much better grasp on this.