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RE: ARM vectors.S question



On 26-Oct-99 Grant Edwards wrote:
> 
> I'm in the process of getting eCOS to run on a Samsung SNDS eval board
> (ARM7TDMI core w/ a bunch of on-chip Samsung peripherals).  The file
> ecos-1.2.1/packages/hal/arm/arch/v1_2_1/src/vectors.S claims to be
> platform independent, yet it seems to make assumptions about the
> memory map that are platform-dependent.
> 
> For example, it assumes that there is RAM at address 0 so the
> startup code initializes the exception vectors that are at address 0.
> 
> After reset, the SNDS board has ROM at address 0, as will any embedded
> system (if I understand the processor startup sequence).  There are
> two ways to deal with this:
> 
>  1) The SNDS ROM vectors interrupts via a table of addresses that is
>     in RAM, so user code can install pointers to ISRs in RAM at a
>     particular address (0x13fffd0, FWIW).
> 
>  2) The memory configuration can be altered after startup to re-map RAM
>     to address 0 and ROM to somewhere else.
> 
> Either of these would require changes to "platform independent"
> sections of eCOS. 
> 
> Am I missing something?
> 

Not at all.  To date, we have assumed that the environment on ARM platforms
will have RAM at zero.  This is the most flexible and easiest setup for us.

However, as you note, there are some platforms that are not laid out this
way.  For the ones of these that we have already encountered, we chose
to implement solution (2) above.

There certainly will be some situations where only (1) will do.  If/when
that becomes the case, we'll have to adopt a "vectored" approach.

Does your hardware have a MMU or some other way to alter the memory layout?

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