[ECOS] ARM platform porting problem

[Grant Edwards <grante at visi dot com>]

I'm trying to get eCOS running on a Samsung eval board, but the
start-up machine code that gets loaded into RAM doesn't seem to match
up with the any of the assembly language source files that I can
find.

Specifically, the code starting at reset_vector doesn't look right.

I'd like to compare the machien code I see in memory with what the
assembler thinks it generated.  I tried to get the assembler to
generate a listing for vectors.S, but it won't show the machine
code for the routine in question.

The listing claims that reset_vector is at offset 0 in that file's
text segment, but the listing dosen't show any machine code below
00b4:

   1              	# 1 "/home/grante/ecos/ecos-1.2.1/packages/ecos-arm7/../hal/arm/arch/v1_2_1/src/vectors.S"
   2              	 
   1              	// #========================================================================
   2              	// #
   3              	// #    vectors.S
   4              	// #
   5              	// #    ARM exception vectors
   6              	// #

[ several thousand lines snipped ]

  69              		.file	"vectors.S"

[...]

I _think_ there should be machine code generated for the routine
below, but I can't figure out how to get the assembler to show me what
it is.  I'm convinced that the assembler thinks it's generating
code, because the labels below seem to get defined, and the offset
with the text segment is getting incremented, since later it's at
0x00b4.

 102              		.text	
 103              	// Startup code which will get the machine into supervisor mode
 104              		.global	reset_vector
 105              		.type	reset_vector,function
 106              	reset_vector:
 107              	#if defined(CYG_HAL_STARTUP_RAM) && \
 108              	    !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
 109              		mrs	r7,cpsr			// move back to IRQ mode
 110              		and	r7,r7,#CPSR_MODE_BITS
 111              		cmp	r7,#CPSR_SUPERVISOR_MODE
 112              		beq	start
 113              	#endif
 114              	
 115              		PLATFORM_SETUP1		// Early stage platform initialization
 116              					// see <cyg/hal/hal_platform_setup.h>
 117              	
 118              		mov	r0,#0		// move vectors
 119              		ldr	r1,.__exception_handlers
 120              		ldr	r2,[r1,#0x04]	// undefined instruction
 121              		str	r2,[r0,#0x04]
 122              		ldr	r2,[r1,#0x24]	
 123              		str	r2,[r0,#0x24]
 124              		ldr	r2,[r1,#0x08]	// software interrupt
 125              		str	r2,[r0,#0x08]
 126              		ldr	r2,[r1,#0x40]
 127              		str	r2,[r0,#0x28]
 128              		swi			// switch to supervisor mode
 129              	
 130              	// =========================================================================
 131              	// Real startup code. We jump here from the reset vector to set up the world.
 132              		.globl	start
 133              	start:	
 134              	
 135              	#if defined(CYG_HAL_STARTUP_RAM) && \
 136              	    !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
 137              	// If we get restarted, hang here to avoid corrupting memory

[...]

 168              		str	r2,[r0,#0x2C]
 169              		ldr	r2,[r1,#0x10]	// abort (data)
 170              		str	r2,[r0,#0x10]
 171              		ldr	r2,[r1,#0x30]
 172              		str	r2,[r0,#0x30]

[...]

 190              		// initialize interrupt/exception environments
 191 00b4 FCD39FE5 		ldr	sp,.__startup_stack
 192 00b8 D200A0E3 		mov	r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_IRQ_MODE)
 193 00bc 00F029E1 		msr	cpsr,r0
 194 00c0 F4D39FE5 		ldr	sp,.__exception_stack
 195 00c4 DD00A0E3 		mov	r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE)
 196 00c8 00F029E1 		msr	cpsr,r0
 197 00cc E8D39FE5 		ldr	sp,.__exception_stack

from here on, the listing contains machine code as expected...

[...]

 659 04e4 00000000 	PTR(hal_interrupt_objects)
 660 04e8 00000000 	PTR(__exception_handlers)
 661 04ec 00000000 	PTR(init_flag)
 662              	#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 663 04f0 00000000 	PTR(cyg_scheduler_sched_lock)
 664              	#endif
 665              	#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 666 04f4 00110000 	PTR(irq_level)
 667 04f8 00110000 	PTR(__interrupt_stack)
 668              	#endif
 669              	
 670              	
 671              	// -------------------------------------------------------------------------
 672              	// Interrupt vector tables.
 673              	// These tables contain the isr, data and object pointers used to deliver
 674              	// interrupts to user code.
 675              		
 676 04fc 2000000B 		.data
 677              	
 678              	init_flag:
 679 0000 00000000 		.long	0
 680              	
 681              		.extern hal_default_isr
 682              	
 683              		.globl	hal_vsr_table
 684              	hal_vsr_table:
 685              		.rept	CYGNUM_HAL_VSR_COUNT
 686              		.long	0		// hal_default_isr
 687              		.endr
 688 0004 00000000 	
 688      00000000 
 688      00000000 

[...]

 758              	
 759              	// --------------------------------------------------------------------------
 760              	//  end of vectors.S
DEFINED SYMBOLS
[...]
           vectors.S:106    .text:00000000 reset_vector
           vectors.S:133    .text:00000044 start
[...]