Re: [ECOS] eCos synthetic target on Sun/Sparc ?

[Bart Veer <bartv at redhat dot com>]

>>>>> "Arvind" == Arvind  <arvindj@sasi.com> writes:

    Arvind> Is it possible to have a eCos synthetic target on
    Arvind> SunOS/Ultra Sparc instead of Linux/x86.

    Arvind> Motivation: i am looking for cache profiling tools on the
    Arvind> net, most of the ones that were useful to me run on Sparc
    Arvind> machines, and the only Sparc machine that we have runs
    Arvind> SunOS.

It may be possible, but it will require a fair bit of porting work.

The first requirement is that the eCos synthetic target application
must be linked without using any of the SunOS libraries, because of
name clashes etc. Your synthetic target app will want to use the eCos
version of printf(), not the SunOS one.

However, the synthetic target app must still make certain kernel
calls, for example read() and write(). This list will be extended in
future as the synthetic target is developed further. Under Linux all
of the calls are available as system traps, so read is defined
using something like:

        .globl cyg_hal_sys_read;                \
                                                \
cyg_hal_sys_read:                               \
                                                \
        push %ebx;                              \
        mov 8(%esp), %ebx;                      \
        mov 12(%esp), %ecx;                     \
        mov 16(%esp), %edx;                     \
        lea     3, %eax;                        \
        int $0x80;                              \
        pop %ebx;                               \
        ret;                                    \

The actual code uses various macros to keep things simple. So the eCos
HAL can make Linux system calls without linking with any Linux
libraries. You would have to figure out the SunOS equivalent, i.e. how
to make system calls directly without linking with any SunOS
libraries.

There may be other problems as well, you would certainly need to take
a good look at the existing synthetic target code. However the above
work would certainly need to be done.

    Arvind> If you guys know any good cache profiling tools on
    Arvind> Linux/x86, i would be interested in hearing about them
    Arvind> also. Thanks for any response,

By a strange coincidence, I spotted the text below on another mailing
list today. It may be useful.

Bart

------------------------------------------------------------------------
I was just catching up on my linux-kernel mailing list and noticed:

| From owner-linux-kernel-outgoing@vger.rutgers.edu  Sat May 13 18:55:48 2000  
| Date:   Sun, 14 May 2000 00:49:18 +0200 (MET DST)
| From: Mikael Pettersson <mikpe@csd.uu.se>
| Message-Id: <200005132249.AAA01834@harpo.it.uu.se>
| To: linux-kernel@vger.rutgers.edu
| Subject: [Announce] Version 1.1 of x86 performance counters driver
| 
| Version 1.1 of my x86 performance-monitoring counters driver is
| now available at http://www.csd.uu.se/~mikpe/linux/perfctr/.
| 

           Linux x86 Performance-Monitoring Counters Driver
                by Mikael Pettersson <mikpe@csd.uu.se>
                       [Last updated 2000-05-13]
========================================================================

Latest Updates
--------------
Version 1.1, 2000-05-13
- Support for Linux kernels 2.2.14, 2.2.15 and 2.3.99-pre8.
- Changes to the driver and user-space library to reduce the
  number of getpid() calls. (Suggested by Ulrich Drepper.)
- Added support for the VIA Cyrix III processor.
- Performance improvements in the x86 driver interface.
- Some code cleanups.

Overview
--------
This package adds support to the Linux kernel for using the
Performance-Monitoring Counters (PMCs) found in many modern
x86-class processors. Supported processors are:
- All Intel family 5 and 6 processors, i.e. Pentium, Pentium MMX,
  Pentium Pro, Pentium II, Celeron, and Pentium III.
- AMD K7 Athlon. (Note: the K6 family has no PMCs.)
- Cyrix 6x86MX, MII, and III.
- WinChip C6, 2, 2A, and 3.

PMCs are "event counters" capable of recording any of a large
number of performance-related events during execution.
These events typically include instructions executed, cache
misses, TLB misses, stalls, and other events specific to
the microarchitecture of the processor being used.

<snip>

Status
------
The code has been tested on Intel Pentium, Pentium MMX,
Pentium II, Pentium III, and AMD K7 processors, UP and SMP
kernels, with and without modules.

This and future versions of this package can be downloaded from
http://www.csd.uu.se/~mikpe/linux/perfctr/.