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Makefile rule and dependencies problem
- To: "Ecos-List (E-mail)" <ecos-discuss at sourceware dot cygnus dot com>
- Subject: [ECOS] Makefile rule and dependencies problem
- From: Fabrice Gautier <Fabrice_Gautier at sdesigns dot com>
- Date: Tue, 22 Aug 2000 11:27:39 -0700
Hi,
the default target for source file in the eCos Makefiles is something like:
%.o.d : %.c
@mkdir -p $(dir $@)
$(CC) -c $(INCLUDE_PATH) -I$(dir $<) $(CFLAGS)
-Wp,-MD,$(@:.o.d=.tmp) -o $(dir $@)$(OBJECT_PREFIX)_$(notdir $(@:.o.d=.o))
$<
@echo $@ ':' $< '\' > $@
@tail +2 $(@:.o.d=.tmp) >> $@
@echo >> $@
@rm $(@:.o.d=.tmp)
Unfortunately, the two following lines:
@echo $@ ':' $< '\' > $@
@tail +2 $(@:.o.d=.tmp) >> $@
assume that the first dependency line generated by gcc contains only one the
.c file dependency. So it would work for something like:
file.o : file.c \
file1.h \
file2.h
but not if the generated depends is like:
file.o : file.c file1.h file2.h
Don't know how to correct that however.
Thanks
--
Fabrice Gautier
fabrice_gautier@sdesigns.com