[ECOS] about interrupts nesting and vector number decoding

["yyl" <ylyuan at davform dot com>]

Hi,i have tow questions need your help.

Q1:From document,i know that isr is excuted with interrupt disabled,but dsr enable interrupt,so i think the interrupt nesting is occured  in dsr.But from another place in the document,something is said as followed:

 

      The VSR should follow the following approximate plan:

          ........

          (Optional) Re-enable interrupts to permit nesting.

          Decode the actual external interrupt being delivered from the interrupt controller. This will yield the ISR vector number.

          Using the ISR vector number as an index, retrieve the ISR pointer and its data pointer from the ISR vector table. 

          Construct a C call stack frame.

 

If re-enable interrupts before isr being called ,it seems that in isr interrupt is enabled.

Who can tell me the procedure  about the interrupt nesting?

Q2:i think the macro of  hal_intc_decode in the file variant.inc only decodes the vector from SIU level,i don't find the code decoding

the vector using the rigester CIVR of CPM?

     Thanks!