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SH4 cache problem
- To: ecos-discuss at sources dot redhat dot com
- Subject: [ECOS] SH4 cache problem
- From: "Suzuki,RyosIII" <ryos at atom-tc dot or dot jp>
- Date: Wed, 28 Feb 2001 00:41:51 +0900
Hello,
I found another SH4 problems in current CVS tree about cache,
I know current eCos doesn't support SH4's cache.
However I think it is gdb_stub problem since I can run with cache
by using Hardware debugger.
please check following, and I hope this problems is fixed in near future.
Thank you,
--- sh/sh4/current/include/var_cache.h Sat Nov 4 06:17:47 2000
+++ /home/projects/SH/SH4/packages/hal/sh/sh4/current/include/var_cache.h
W
ed Feb 28 00:20:38 2001
@@ -125,14 +125,14 @@
//#define HAL_ICACHE_BURST_SIZE(_size_)
// Set the cache write mode
-#define HAL_ICACHE_WRITE_MODE( _mode_ ) \
+#define HAL_DCACHE_WRITE_MODE( _mode_ ) \
CYG_MACRO_START \
cyg_uint32 _m_; \
if (HAL_DCACHE_WRITETHRU_MODE == _mode_) \
_m_ = CYGARC_REG_CCR_WT; \
else \
_m_ = CYGARC_REG_CCR_CB; \
- cyg_hal_cache_write_mode(_m_); \
+ cyg_hal_dcache_write_mode(_m_); \
CYG_MACRO_END
#define HAL_DCACHE_WRITETHRU_MODE 0
--- sh/sh4/current/src/variant.S Tue Feb 20 02:50:47 2001
+++ /home/projects/SH/SH4/packages/hal/sh/sh4/current/src/variant.S Wed Feb
28 00:20:51 2001
@@ -73,7 +73,8 @@
mov.l $nCYGARC_REG_CCR,r1
mov.l @r1,r0
mov #CYGARC_REG_CCR_OCE,r2
- mov.l r2,@r1
+ or r2,r0
+ mov.l r0,@r1
nop
rts
nop
@@ -164,7 +165,8 @@
mov.l $nCYGARC_REG_CCR,r1
mov.l @r1,r0
mov.l $nCYGARC_REG_CCR_ICE,r2
- mov.l r2,@r1
+ or r2,r0
+ mov.l r0,@r1
nop
rts
nop
--
Suzuki,Ryouzaburou
ryos@atom-tc.or.jp