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Re: interrupts
- To: <rrv at tid dot es>
- Subject: Re: [ECOS] interrupts
- From: rob dot wj dot jansen at philips dot com
- Date: Wed, 30 May 2001 13:54:38 +0200
- Cc: <ecos-discuss at sourceware dot cygnus dot com>
Hm,
> In my system it only takes 1000 cycles to start the ISR, but my system is not well designed, it uses an ARM7TDMI,
> running at 0.8 MHz, but with an 8 bit memory with a WAIT state, so every word takes 8 cycles to be read, so the
> number of cycles that I suppose that the system would take with a good memory configuration would be just 125
> cycles.
Thanks for the info.
I guess I'll have to walk through the assembly code to count the cycles, I have to admit that I am a bit confused
bout the amount of time taken to handle the interrupt.
Looking at the code most of the time (IMHO) will be lost in the hal_IRQ_handler function which, in my case,
only reads a register from the interrupt controller which returns a byte index in the array. Maybe the time has come
to add an assembly define (#define HAL_PLATFORM_IRQ_HANDLER). In my case a "ldr r1,=ADRRESS; ldr r0,[r1]"
would replace the complete hal_IRQ_handler.
I guess that such a kind of optimization would also be usable for the powerpc platform.
Regards,
Rob Jansen
Software Engineer
Competence Center Platforms
BU Mobile Communications
Meijhorst 60-10, 6537 KT Nijmegen, The Netherlands
Tel: +31-24-353-6329
Fax: +31-24-353-3613
mailto:Rob.WJ.Jansen@philips.com