[ECOS] Frequency scaling on iPaq

[Cristiano Ligieri Pereira <cpereira at ics dot uci dot edu>]

Hi everybody,

I'm a little bit confused regarding how to scale the frequency on the
StrongARM SA1110 compaq ipaq platform. I'm trying to scale processor
frequency simply writting into the appropriate memory mapped register
(PPCR - Power Manager PLL Configuration Register). The values to be
written and the address of the register are described in the file
cyg/hal/hal_sa11x0.h (SA11X0_PWR_MGR_PLL_CONFIG is the register and the
values are SA11X0_CLOCK_SPEED_59_0_MHz, SA11X0_CLOCK_SPEED_73_7_MHz,
etc...).

The default processor operation seems to be at 206.4Mhz. If I try to scale
it down to 162.2 it seems to work fine but if I go down one more
level, which is 147.5, the system crashes. Looking at the file cpu-scale.c
of ipaqlinux source code I noticed that DRAM timing is related to the core
clock frequency and then DRAM timing properties have to be adjusted along
with the processor core frequency, otherwise DRAM becomes unusable and the
kernel crashes (that's is what is described in the source code). Or
alternatively the code responsible to scale the frequency has to be
executed at the ROM (Flash) memory.

Looking at the Intel StrongARM SA-1110 Microprocessor Developer's Manual
it is also described that the DRAM timing depends on the processor core
frequency.

I believe the same thing is happening with eCos/ipaq package since I'm
executing the code from the DRAM memory and I'm not adjusting any DRAM
timing parameter. Have anyone tried the same thing? Am I saying something
wrong? Did anyone have the same problem?

Thanks,
Cristiano.

------------------------------------------------------------ 
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira