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crash while clearing .bss in vectors.S (on SA1100)
- To: ecos-discuss at sources dot redhat dot com
- Subject: [ECOS] crash while clearing .bss in vectors.S (on SA1100)
- From: Andreas Bürgel <ab at genologic dot de>
- Date: Mon, 18 Jun 2001 11:59:16 +0200
- Organization: GenoLogic GmbH, Dortmund
Hi folks,
I'm desperate. My application crashes in the eCos startup-code in
vectors.S:
[...]
// clear BSS
ldr r1,.__bss_start
ldr r2,.__bss_end
mov r0,#0
cmp r1,r2
beq 2f
1: str r0,[r1],#4
cmp r1,r2
bne 1b
2:
[...]
after lots of iterations - I'm unable to tell you the exact number,
because it's a long running loop - the app hangs.
__bss_start is 0x553C0 and __bss_end is 0x1054E4
Other (testing) applications work linked again the same
eCos-environment, but they have other values defined for __bss_* for
example
__bss_start is 0x2EB84 and __bss_end is 0x3617C is working.
Can there be a problem with some 1MB border in the MMU? I'm using a
custom board with a StrongARM 1100 and 16MB Ram and the following
MMU-first-level-table and linker script. I'm using the eCos-CVS version
from June 8th.
X_ARM_MMU_SECTION ( 0x000,
0x400,
1,
ARM_CACHEABLE,
ARM_BUFFERABLE,
ARM_ACCESS_PERM_RW_RW) // Flash
X_ARM_MMU_SECTION ( 0x800,
0x800,
0x400,
ARM_UNCACHEABLE,
ARM_UNBUFFERABLE,
ARM_ACCESS_PERM_RW_RW) // SA1100 regs
X_ARM_MMU_SECTION ( 0xC00,
0x000,
16,
ARM_CACHEABLE,
ARM_BUFFERABLE,
ARM_ACCESS_PERM_RW_RW) // RAM
X_ARM_MMU_SECTION ( 0xE00,
0xE00,
128,
ARM_CACHEABLE,
ARM_BUFFERABLE,
ARM_ACCESS_PERM_RW_RW) // zero bank
X_ARM_MMU_SECTION ( 0x100,
0x100,
1,
ARM_UNCACHEABLE,
ARM_UNBUFFERABLE,
ARM_ACCESS_PERM_RW_RW) // FPGA interface
// memory layout for RAM-startup
INPUT ( idm1100a.ihex)
MEMORY
{
ram : ORIGIN = 0, LENGTH = 0x1000000
rom : ORIGIN = 0x40000000, LENGTH = 0x100000
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
SECTION_rom_vectors (ram, 0x10000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
.sec1 ALIGN (0x4) : { __fpga_data_start = ABSOLUTE (.); *(.sec*)
__fpga_data_end = ABSOLUTE (.); } > ram
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
Any ideas?
Thanks in advance.
--
-----------------------------------------------------
i.A. Andreas Bürgel GenoLogic GmbH
Software Engineer Joseph-von-Fraunhofer-Str. 13
D-44227 DORTMUND
Germany
ab@genologic.de phone +49 (0) 231/477349-0
fax +49 (0) 231/4761234