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RE: sdram scrubbing and MMU enabling.
- To: "'Mark Salter'" <msalter at redhat dot com>
- Subject: RE: [ECOS] sdram scrubbing and MMU enabling.
- From: "Mynampati, Venkata S." <MynamVS at nsc-msg01 dot network dot com>
- Date: Fri, 3 Aug 2001 12:26:47 -0500
- Cc: ecos-discuss at sources dot redhat dot com
are
> >> > enabling MMU and then scrubbing sdram starting from
> >> RAM_BASE i.e A0000000.
> >> > Now, my doubt is:
> >> > since we have mapped the first 4K of RAM to flash,
> >> > [ mmu_table_rambase:
> >> > // Map 4k page at 0xa0000000 virt -->
> >> 0x00000000 physical
> >> > // Read-Write, cacheable, non-bufferable ]
> >> > does that mean writing a 0x00 to a0000000 is same as
> >> writing to flash?
> >> > Am i missing something here?
> >>
> >> No, its a problem. It came up this week on the ARM linux
> >> kernel mailing list.
> >> I'm working on a fix.
> >>
> >> --Mark
> >>
> > what i am doing is scrubbing and then enabling mmu.
>
> I was told by the hw designer that that would not work. Scrubbing
> needs to occur with the dcache/ECC turned on which means the MMU
> must be on.
>
> There is also a related problem where the first 1MB of SDRAM does
> not have ECC turned on. Since the board is populated with ECC RAM,
> its likely that single bit errors will occur and go undetected.
>
> --Mark
I am going thru 80312's documentation page 3-31, section
3.2.4.4 and it's related to Scrubbing. This doesn't say anything
about cache's. Is it in someother section? also, where can i find
info about first 1MB of sdram stuff?
Venkat