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Re: interrupt latency (ARM7)
- To: Jonathan Larmour <jlarmour at redhat dot com>
- Subject: Re: [ECOS] interrupt latency (ARM7)
- From: Gary Thomas <gthomas at redhat dot com>
- Date: 17 Oct 2001 08:22:49 +0900
- Cc: Ilko Iliev <iliev at caretec dot at>,eCos Discussion <ecos-discuss at sources dot redhat dot com>
- References: <5.1.0.14.2.20011016154349.05fca978@mbox> <3BCCA9A6.9F91AEF@redhat.com>
On Wed, 2001-10-17 at 06:41, Jonathan Larmour wrote:
> Ilko Iliev wrote:
> >
> > I have custom board with ARM7 (AT91M55800) at 33Mhz system CPU clock.
> >
> > I measured ISR handling latency time 48-90 mkSec.
> >
> > It is normal???
>
> Maybe; it depends on a whole lot of things like speed of RAM, speed of ROM
> (if you're running from ROM) and the settings of quite a few options in the
> eCos configuration. I can guarantee it could be reduced by using different
> configuration options; the default configuration is not the fastest!
Other things can affect this greatly.
* Does this system run from ROM/FLASH or RAM?
* Does the CPU have caches? what size? are they enabled?
Many of the "simpler" ARM7 device cores do not have any caches which
serverly impacts their performance.
Just a few things to think about.