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Re: powerpc serial driver
- From: Jonathan Larmour <jlarmour at redhat dot com>
- To: Christoph Csebits <christoph dot csebits at frequentis dot com>
- Cc: eCos mailing list <ecos-discuss at sources dot redhat dot com>
- Date: Thu, 29 Nov 2001 04:34:42 +0000
- Subject: Re: [ECOS] powerpc serial driver
- References: <20011109105803.A14945@frequentis.com>
Christoph Csebits wrote:
>
> i am writing on a SCC UART driver for eCos, and
> derived it from the existing SMC driver.
>
> i made some changes to get it working. here
> are the changes for the SMC driver.
>
> i could not test it, not even compile it.
> ( i do not have a SMC serial port).
>
> It concerns flushing the cache before
> flushing the device.
I'm not entirely sure about this. In this bit:
@@ -398,11 +401,11 @@
TxBD,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxSIZE,
- &quicc_smc1_txbuf[0][0],
+ (cyg_uint8
*)ALIGN_TO_CACHELINES(&quicc_smc1_txbuf[0][0], 32),
If quicc_smc1_txbuf isn't aligned, then it won't be
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxSIZE long any more.
Also, got a ChangeLog entry?
Jifl
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