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- From: Motoya Kurotsu <kurotsu at allied-telesis dot co dot jp>
- To: Jonathan Larmour <jlarmour at redhat dot com>
- Cc: ecos-discuss at sources dot redhat dot com
- Date: Fri, 15 Feb 2002 11:00:14 +0900
- Subject: Re: [ECOS] interrupt_end
- References: <20020214120837.A2311@white.office1> <3C6C1222.CEB7387D@redhat.com> <20020215105404.A1391@white.office1>
On Fri, Feb 15, 2002 at 10:54:04AM +0900, Motoya Kurotsu wrote:
So I think that the hal_cpu_except_enable is not correct.
I see the current one such like the following in arch.inc.
and v0,v0,v1 # clear EXL, ERL and IE bits
I think that it should be the following:
and v0,v0,v1 # clear EXL and ERL bits
ori v0,v0,0x0001 # set IE bit
As you see, the original one clears a part of KSU bit. It also needs
to be fixed, doesn't it?
Allied Telesis K.K.
On Thu, Feb 14, 2002 at 07:38:10PM +0000, Jonathan Larmour wrote:
> Motoya Kurotsu wrote:
> > Hi all,
> > Is my understanding correct that the interrupt_end which is defined
> > in hal/common must be called with interrupts enabled?
> > I am seeing mips/arch/currect/src/vector.S, but I can't specify
> > where interrupt is reenabled before the interrupt_end is called
> > in default interrupt VSR.
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