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Re: FIQ on ARM (ATMEL EB40A)
- From: Gary Thomas <gthomas at ecoscentric dot com>
- To: Serge Manigault <Serge dot Manigault at ask dot fr>
- Cc: eCos Discussion <ecos-discuss at sources dot redhat dot com>,Alain BESSE <alain dot besse at ask dot fr>
- Date: 05 Sep 2002 07:59:29 -0600
- Subject: Re: [ECOS] FIQ on ARM (ATMEL EB40A)
- References: <3D77528A.A66AADE6@ask.fr>
On Thu, 2002-09-05 at 06:48, Serge Manigault wrote:
> Hello,
> I tried to use the FIQ interrupt like the 3 IRQ on an ATMEL AT91EB40A
> target,
<snio>
> and we never get any ISR/DSR routines called when the FIQ occures
> ecos enters in the call_pending_DSRs function and loop back to the FIQ
> interrupt.
> Does anyone already succeed in implementing the FIQ like an IRQ, or in
> another manner?
> Is there something wrong in our implementation?
Since you're not showing your ISR, I have to ask:
* Do you arrange in the ISR to keep additional FIQ interrupts
from occurring? DSR processing runs in interruptable mode (to
allow new interrupts [presumably from other devices] to occur
during the DSR processing). If your device is still asserting
FIQ and it's not masked, as soon as interrupts are re-enabled
for the DSR processing, you'll get another FIQ interrupt.
--
------------------------------------------------------------
Gary Thomas |
eCosCentric, Ltd. |
+1 (970) 229-1963 | eCos & RedBoot experts
gthomas@ecoscentric.com |
http://www.ecoscentric.com/ |
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