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Re: 82559 Self Test failure


I have had a similar problem recently on a mips based new platform :
the pci to native bridge internal to the part has to be set to translate to
the correct memory regions , there is also an hardware endian swap in the
bridge that has to be set correctly, as pointed out by Mark the window in
memory where the self test values are written by the 82559 have to be set up
right (there are several examples of code in other platforms , the one i
followed was the ocelot) . For the 82559 to be bus master and write to the
memory , you can verify that it is really set up via an independant pci test
program for that platform . An other reason that could fail self test is
that memory in that particular area where data is written is defective. Some
of those items may not apply to the iq80310 but they did apply to the idt
32332

good luck

Henri


From: Mark Salter <msalter at redhat dot com>
To: ligieri2002 at hotmail dot com
Cc: ecos-discuss at sources dot redhat dot com
Date: Wed, 9 Oct 2002 11:50:49 -0400
Subject: Re: [ECOS] 82559 Self Test failure
References: <F83EhrkMNYwoyJlfzsq0001ade5@hotmail.com>

----------------------------------------------------------------------------
----

>>>>> Cristiano Pereira writes:

> Hi Mark,
> It's not a PC. It's a board similar to the IQ80310 but the code for
handling
> the 82559 is the same as the one for the IQ80310 board.

Okay. Well, I'd suggest checking the secondary PCI inbound windows and that
the 82559 is getting the correct bus address to allow it access to RAM. Not
being able to access main RAM is what caused the selftest to fail in the
cases I saw.

--Mark





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