Index: hal_platform_setup.h =================================================================== RCS file: /cvs/ecos/ecos/packages/hal/arm/snds/current/include/hal_platform_setup.h,v retrieving revision 1.2 diff -u -5 -p -r1.2 hal_platform_setup.h --- hal_platform_setup.h 23 May 2002 23:02:30 -0000 1.2 +++ hal_platform_setup.h 21 Oct 2002 17:15:59 -0000 @@ -70,11 +70,11 @@ // Use relative branch since we are going to switch the address space // around. #define CYGSEM_HAL_ROM_RESET_USES_JUMP -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) #define PLATFORM_SETUP1 \ ldr r1,=KS32C_IOPMOD ;\ ldr r2,=0xff /* set led display to output */ ;\ str r2,[r1,#0x00] ;\ LED 0xaa ;\ @@ -220,11 +220,11 @@ |(KS32C_REFEXTCON_TCHR_1C) \ |(KS32C_REFEXTCON_REN) \ |(KS32C_REFEXTCON_VSF) \ |(KS32C_REFEXTCON_BASE)) ;\ ;\ - /* Sync DRAM setup */ ;\ + /* Sync DRAM setup (2 K4S641632D TC1L chips = 16MByte) */ ;\ /* Flash is 16 bit, everything else 32 bit */ ;\ /* .long KS32C_EXTDBWTH */ ;\ 40: .long ( (KS32C_EXTDBWTH_16BIT<> 16) << KS32C_ROMCON_BASE_shift) \ |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift)) ;\ /* .long KS32C_DRAMCON0 */ ;\ .long ( (KS32C_DRAMCON_RESERVED) \ |(KS32C_DRAMCON_CAN_8) \ - |(KS32C_DRAMCON_TRP_4C) \ + |(KS32C_DRAMCON_TRP_2C) \ |(KS32C_DRAMCON_TRC_2C) \ |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \ - |((0x00400000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ + |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ /* .long KS32C_DRAMCON1 */ ;\ .long ( (KS32C_DRAMCON_RESERVED) \ |(KS32C_DRAMCON_CAN_8) \ |(KS32C_DRAMCON_TRP_2C) \ |(KS32C_DRAMCON_TRC_2C) \ - |((0x00400000 >> 16) << KS32C_DRAMCON_BASE_shift) \ - |((0x00800000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ + |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \ + |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ /* .long KS32C_DRAMCON2 */ ;\ .long ( (KS32C_DRAMCON_RESERVED) \ |(KS32C_DRAMCON_CAN_8) \ |(KS32C_DRAMCON_TRP_2C) \ |(KS32C_DRAMCON_TRC_2C) \ - |((0x00800000 >> 16) << KS32C_DRAMCON_BASE_shift) \ - |((0x00c00000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ + |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \ + |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ /* .long KS32C_DRAMCON3 */ ;\ .long ( (KS32C_DRAMCON_RESERVED) \ |(KS32C_DRAMCON_CAN_8) \ |(KS32C_DRAMCON_TRP_2C) \ |(KS32C_DRAMCON_TRC_2C) \ - |((0x00c00000 >> 16) << KS32C_DRAMCON_BASE_shift) \ - |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ + |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \ + |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift)) ;\ /* .long KS32C_REFEXTCON */ ;\ .long (((2048+1-(8*CYGNUM_HAL_CPUCLOCK/1000000)) << KS32C_REFEXTCON_RCV_shift) \ |(KS32C_REFEXTCON_TRC_4C) \ |(KS32C_REFEXTCON_REN) \ |(KS32C_REFEXTCON_VSF) \