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Re: PC at the time of interrupt in ISR
On Fri, 2002-11-08 at 05:33, Andrew Lunn wrote:
> On Fri, Nov 08, 2002 at 01:25:53PM +0100, Niclas Eriksson wrote:
> > Hi,
> > Is there an easy way to get the program counter (PC) at the time of the
> > interrupt from within an ISR ?
> > I'm using Ecos on an ARM7 target, the Atmel AT91EB40 board.
> > Thanks in advance,
>
> There are two ways... One is HAL dependent, but works on ARM:
>
> /* This is the interrupt handler. It finds out the PC address before
> the interrupt and calls the increment. It then clears the interrupt
> and returns */
> cyg_uint32
> prof_ISR(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) {
>
> prof_do_ISR(regs->pc);
>
> prof_clear_timer_intr();
> cyg_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_TIMER_2);
>
> return (CYG_ISR_HANDLED);
> }
>
> It uses an undocument extra parameter to the ISR. Since this is
> undocument, this feature may disappear, but its been there for over 3
> years....
>
> The second way is:
>
> externC HAL_SavedRegisters *hal_saved_interrupt_state;
>
> /* This is the interrupt handler. It finds out the PC address before
> the interrupt and calls the increment. It then clears the interrupt
> and returns */
> cyg_uint32
> prof_ISR(cyg_vector_t vector, cyg_addrword_t data) {
>
> if ( hal_saved_interrupt_state )
> {
> /* Current instruction, not next */
> prof_do_ISR(hal_saved_interrupt_state->pc);
> }
> cyg_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_TM1);
> return (CYG_ISR_HANDLED);
> }
>
> Im not sure of the documentation status of this....but it should work
> for all HAL types ( i think. I've only used it in mips )
>
> Look back in the mail archive. This has been discussed before.
>
> Note that ARM increments the PC before servicing the ISR. So PC will
> be 4 bytes after the instruction that got interrupted.
Actually, no. On the ARM, we fix up the PC before saving it
during interrupt/exception entry.
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Gary Thomas |
eCosCentric, Ltd. |
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gthomas@ecoscentric.com |
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