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RE: ARM's Exception vector location


Actually, some of the ARM parts have a coprocessor register that changes the location of the interrupt vectors from a base address
of 0 to some other base address.  (I forget where right now, but consult the documentation for your part).  Also, it seems to me
that, if the part has an MMU, you should be able to change the interrupt vectors to a different memory mapped page.  I believe that
the part branches to virtual addresses (rather than physical addresses) upon exception.

--wpd


> -----Original Message-----
> From: ecos-discuss-owner@sources.redhat.com
> [mailto:ecos-discuss-owner@sources.redhat.com]On Behalf Of Grant Edwards
> Sent: Tuesday, November 19, 2002 7:14 AM
> To: AL Chane
> Cc: ecos-discuss@sources.redhat.com
> Subject: Re: [ECOS] ARM's Exception vector location
>
>
> On Tue, Nov 19, 2002 at 06:00:42PM +0800, AL Chane wrote:
>
> >       ARM's "vectors.s" defines those exception vectors
> > (reset, Undefined instructions, software interrupt,....IRQ, FIQ)
> > from 0x00, 0x04.....0x1C. But I have an ARM board its address
> > from 0x00 to 0x80000 are reserved for boot area. I wonder if I can
> > relocate those exception vectors in vectors.s to other memory area?
>
> No.  Those locations are hard-wired in the silicon.
>
> > Are ARM exception vectors relocatable?
>
> Nope.
>
> --
> Grant Edwards
> grante@visi.com
>
> --
> Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
> and search the list archive: http://sources.redhat.com/ml/ecos-discuss
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