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Re: HAL_DCACHE_xxx macros in mpc8xx HAL
On Wed, Dec 11, 2002 at 06:52:43AM -0700, Gary Thomas wrote:
> By all means, recommend any changes you'd like. At least it
> will give us "food for thought"
Ok, i show you what i have done for me.
current macro:
#define HAL_DCACHE_FLUSH( _base_ , _size_ ) \
CYG_MACRO_START \
cyg_uint32 __base = (cyg_uint32) (_base_); \
cyg_int32 __size = (cyg_int32) (_size_); \
while (__size > 0) { \
asm volatile ("dcbf 0,%0;sync;" : : "r" (__base)); \
__base += HAL_DCACHE_LINE_SIZE; \
__size -= HAL_DCACHE_LINE_SIZE; \
} \
CYG_MACRO_END
ok, here is are version which is align independent:
#define HAL_DCACHE_FLUSH( _base_ , _size_ ) \
CYG_MACRO_START \
register int base_addr, end_addr; \
for ( base_addr = (~(HAL_DCACHE_LINE_SIZE - 1)) & (int)(_base_), \
end_addr = (int)(_base_) + (_size_); \
base_addr < end_addr; \
base_addr += HAL_DCACHE_LINE_SIZE ) \
{ \
asm volatile ("dcbf 0,%0;sync;" : : "r" (__base)); \
} \
CYG_MACRO_END
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