I added a few lines to vectors.S (see patch below) in order to take in
account the case where an exception occured while the processor was
running in user mode (this patch does not deal with either FIQ or IRQ
for the time being).
I'd like to know advices from Ecos/Redboot experts about this topic...
Pierre
============================================================
--- vectors.S Fri Apr 4 07:36:34 2003
+++ vectors.S.inst Thu Aug 29 13:49:49 2002
@@ -581,25 +581,16 @@
stmfd sp!,{r0-r2,r4,r5} // push svc_sp, svc_lr, vector,
psr, pc
- // has exception occured in user mode ?
- and r2, r1, #CPSR_MODE_BITS
- cmp r2, #0x10
- bne 1f
- stmfd sp, {r8-r12, sp, lr}^ // get user mode regs
- sub sp, sp, #4*7
- bal 2f
-1:
// switch to pre-exception mode to get banked regs
mov r0,sp // r0 survives mode switch
mrs r2,cpsr // Save current psr for return
-
orr r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
bic r1,r1,#CPSR_THUMB_ENABLE
msr cpsr,r1
stmfd r0!,{r8-r12,sp,lr}
msr cpsr,r2 // back to svc mode
mov sp,r0 // update stack pointer
-2:
+
// now save pre-exception r0-r7 on current stack
ldmfd r3,{r0-r5}
stmfd sp!,{r0-r7}
@@ -646,14 +637,6 @@
cmp r1,#CPSR_SUPERVISOR_MODE
ldmeqfd sp,{r0-r14,pc}^
- // are we returning to pre-exception user mode ?
- and r2, r1, #CPSR_MODE_BITS
- cmp r2, #0x10
- bne 1f
- add r2, sp, #armreg_r8
- ldmfd r2, {r8-r14}^
- bal 2f
-1:
//
// return to other non-user modes is a little trickier
//
@@ -666,7 +649,7 @@
msr cpsr,r0
ldmfd r2,{r8-r14}
msr cpsr, r1 // back to svc mode
-2:
+
// move sp,lr and pc for final load
ldr r0,[sp,#armreg_svcsp]
str r0,[sp,#armreg_r8]
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