[ECOS] Re: [openrisc] Re: OpenRISC eCos package

[Marko Mlinar <markom at opencores dot org>]

> >2) Looking at the ARM HAL, cache support is in the platform subdirectory,
> >whereas for OpenRISC it is in the 'arch' subdirectory. Shouldn't it be in
> >the platform subdirectory?
>
> This all goes to the issue you raise above as to whether or not variant
> subdirs are appropriate for OpenRISC, but the short answer is that,
> since there was only one variant at the time I ported eCos, I didn't
> make the effort to create a separate variant for the feature.  Also,
>
>     * Cache support is an option in the OpenRISC architecture HAL, so it
>       can be turned off.
>     * If you accidentally enable eCos cache support on an OpenRISC CPU
>       that doesn't have cache HW, it's innocuous. It's also only a few
>       instructions worth of code, so it's not likely to be much of a
>       bloat factor.
>
> Maybe the right thing to do is to have the code read the CPU config
> registers and disable cache support at run time if it's not supported by
> the CPU HW.
>
> >Out of interest, what template did you use for the port?
>
> I picked out useful chunks mostly from MIPS and a little from PowerPC
> and ARM..
Is it possible to configure eCos with defines? E.g. as it is done in gdb?

or1k architecture also have some configuration registers, where you can read 
configuration from and configure the system.

or1ksim has an option to generate C header file from sim.cfg. This was created 
just for this kind of purposes.

best regards,
Marko


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