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RE: context for creating interrupts on edb7312


> > It appears that cyg_interrupt_enable() acts directly on the CPSR in
> > ARM(after viewing the ASM), but my MAJIC debugger tells me that the CPSR
> > doesn't change unless the scheduler is started. So what in eCos blocks
> > access to the interrupt bits in the CPSR when the scheduler is
> not running?
>
> Nothing - remember eCos is pretty light weight; you can do most anything
> you want at any time.  That said, it's not a good idea to be messing
> around with the interrupts and you should never blindly just enable them
> (unless you want a broken system!)
>
> --
> Gary Thomas <gary@mlbassoc.com>
> MLB Associates
>
>

Ok, I see now that cyg_interrupt_enable runs checks before enabling
interrupts to prevent you from hosing the hole system.

So that I can hose my system fully, I have one last question.

(Last question) Where is the attachment between the generic call
cyg_interrupt_enable()  and the hardware specific hal_interrupts_enable
macro in vectors.S?

Im looking for something along the lines of #define hal_interrupts_enable
cyg_interrupt_enable().

Thanks,
Aaron Case








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