Re: [ECOS] PCI device driver questions

[John Newlin <jnewlin at rawbw dot com>]

> On Fri, 2004-01-30 at 15:21, John Newlin wrote:
> > Hello,
> >
> >
> > I'm working on the driver for a PCI device.
> >
> > There is a region of Bus Address space reserved for mapping PCI I/O and
> > PCI memory regions.
> >
> > Where in the PCI driver does one map a processor physical address to a PCI
> > 32/64 bit address.
> >
> >
> > For example:  If I have one device on PCI that has 1 4MB memory BAR, how
> > would one map that 4MB region into local processor space.
> >
> > Pointers to some code examples would be great!
>
> This happens automatically when you call cyg_pci_configure_bus.  All
> devices (and bridges) are discovered and eCos assigns both I/O and
> memory areas to them at that time.   Later, when you look up a
> particular device, the device information will have a copy of the BAR
> registers so you can determine how to talk to the device.
>
> This file has an example of the HAL PCI glue, including a call to
> configure the PCI space:
>   hal/arm/xscale/uE250/current/src/uE250_pci.c
>
> To see how one might use a PCI device, look at any of the PCI based
> network device drivers.  For example:
>   devs/eth/powerpc/moab/current/include/moab_eth_dp83816.inl
>


Thanks for the pointers Gary.  I am kind of dumb, so please bare with me
here.  :)

First, let's clarify some terminology so my brain does not explode.

virtual address - Address used internally by the processor
physical address - Address that comes out of the processor, and goes on
the process bus.
pci address - Address that appears on the PCI bus (not necessarily the
same as physical)


Alrighty, with that in mind.  In the physical address space, there exists
a region of memory that is N bytes long.

In PCI there exist some number of PCI devices.  Each bar takes some
region of space to map.  Let's say the total amount of PCI address space
to map all of the bars is M bytes.

Now let's say M > N.


The part that I am not understanding is what to do in this case.



Let's make a concrete example.


In this contrived system, in my physical address space, I have 4MBytes of
space that maps into PCI space at one time.  In my PCI device I have a
register that I can set to map to any of the 2^64 address in PCI space.

If I have two PCI devices, and each one requires 4MB of PCI address space
to be completed mapped, then I can only map 1 of these devices into my
processors physical address space at one time.

Is it required that all PCI devices be mappable into the processor's
physical address space?  Or.. is there some mechanism by which different
PCI's address space can be swapped in and out?


I am not too good at Engrish, let me know if this is too confusing in the
way that I have worded it, and I can find a better way to state the
problem.


thanks,

-john


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