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AT91 bad IRQ/FIQ priority handling?


Hi everybody,
looking at at91_misc.c :

int hal_IRQ_handler(void)

I think there is a bug in irq fiq priority when a FIQ and an IRQ are arised
together.
In this case IVR reading updates ISR but with the IRQ number not with the
FIQ one. Then
the irq is served instead of fiq (changing SMR priority doesn't change order
always IRQ before FIQ) .
Is this behavior considered a bug?
I did several trials with my jtst board a new Atmel board with an ARM7+DSP
embedded (where the DSP generates almost simulataneous FIQs and IRQs).
I did a simple patch that solve my problem that is a mix of old and new ecos
irq handling method.

thanks.
Andrea.

------------------------------------------------------------------------
Andrea Michelotti - HW/SW Co-Design Manager
ATMEL Rome -


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