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Re: REG macros in hal_xscale.h
- From: Mark Salter <msalter at redhat dot com>
- To: "Moseley, Drew" <drew dot moseley at intel dot com>
- Cc: ecos-discuss at sources dot redhat dot com
- Date: Sun, 03 Oct 2004 10:15:13 -0400
- Subject: Re: [ECOS] REG macros in hal_xscale.h
- Organization: Red Hat Inc.
- References: <C863B68032DED14E8EBA9F71EB8FE4C204D5D4DB@azsmsx406>
On Tue, 2004-09-28 at 18:20, Moseley, Drew wrote:
> Are the REG8/REG16/REG32 macros in hal_xscale.h misdefined for assembler
> code? I attempted to use these in assembler code w/ a base register and
> obvoously the code failed.
...
> #ifdef __ASSEMBLER__
>
> -#define REG8(a,b) (b)
> -#define REG16(a,b) (b)
> -#define REG32(a,b) (b)
These are the intended definitions where 'a' is a base address
and "b" is the offset. For instance, hal_ixp425.h has:
// SDRAM Registers (Chapter 7)
#define IXP425_SDRAM_CFG_BASE 0xCC000000
#define IXP425_SDRAM_CFG_SIZE 0x00100000
#define IXP425_SDRAM_CONFIG REG32(IXP425_SDRAM_CFG_BASE,0x00)
#define IXP425_SDRAM_REFRESH REG32(IXP425_SDRAM_CFG_BASE,0x04)
#define IXP425_SDRAM_IR REG32(IXP425_SDRAM_CFG_BASE,0x08)
The address of the SDRAM_REFRESH reg is 0xCC000004. To access the
SDRAM controller registers in asm, you'd load a register with the
base address and then use a constant offset from that register.
Something like:
ldr r0, =IXP425_SDRAM_CFG_BASE
ldr r1, [r0, #IXP425_SDRAM_CONFIG]
ldr r2, [r0, #IXP425_SDRAM_REFRESH]
For C code, the macros add the base and offset together so you
access like:
*IXP425_SDRAM_CONFIG = 0;
--Mark
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