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ecos-discuss,hello! My ecos's version is 2.0. I built a redboot using templete E7T.But I found the code in image was different from source(when use label): I use objdump disassembling redboot.elf: ........ 01820040 < reset_vector> : 1820040: e59f147c ldr r1, [pc, #1148] ; 18204c4 < _eCos_id+0x14> 1820044: e59f247c ldr r2, [pc, #1148] ; 18204c8 < _eCos_id+0x18> 1820048: e5812000 str r2, [r1] 182004c: e59f1478 ldr r1, [pc, #1144] ; 18204cc < _eCos_id+0x1c> 1820050: e3a02050 mov r2, #80 ; 0x50 1820054: e5812000 str r2, [r1] 1820058: e59fe470 ldr lr, [pc, #1136] ; 18204d0 < _eCos_id+0x20> 182005c: e59f0470 ldr r0, [pc, #1136] ; 18204d4 < _eCos_id+0x24> 1820060: e8901ffe ldmia r0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip} 1820064: e59f046c ldr r0, [pc, #1132] ; 18204d8 < _eCos_id+0x28> 1820068: e8801ffe stmia r0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip} 182006c: e1a0f00e mov pc, lr 1820070: 0000003e andeq r0, r0, lr, lsr r0 1820074: 18860030 stmneia r6, {r4, r5} 1820078: 00400010 subeq r0, r0, r0, lsl r0 182007c: 00801010 addeq r1, r0, r0, lsl r0 1820080: 08018020 stmeqda r1, {r5, pc} 1820084: 0a020040 beq 18a018c < __rom_data_start+0x738e0> 1820088: 0c028040 stceq 0, cr8, [r2], {64} .. 182009c: 9c218360 stcls 3, cr8, [r1], #-384 18200a0:................ the fllowing is the source(in Hal_platform_setup.h): #define PLATFORM_SETUP1 ;\ ldr r1,=E7T_IOPMOD ;\ ldr r2,=0x0001fcf0 /* set led + seg to output */ ;\ str r2,[r1,#0x00] ;\ ldr r1,=E7T_IOPDATA ;\ ldr r2,=0x00000050 /* set leds */ ;\ str r2,[r1,#0x00] ;\ ;\ 20: ldr lr,=33f ;\ ldr r0,=12f ;\ ldmia r0,{r1-r12} ;\ ldr r0,=E7T_EXTDBWTH ;\ stmia r0,{r1-r12} ;\ mov pc,lr ;\ ;\ /* The below are set with a store-multiple instruction */ ;\ /* Flash is 16 bit, SRAM is 32 bit */ ;\ /* .long E7T_EXTDBWTH */ ;\ 12: .long ( (E7T_EXTDBWTH_16BIT< < E7T_EXTDBWTH_DSR0_shift) \ |(E7T_EXTDBWTH_32BIT< < E7T_EXTDBWTH_DSR1_shift) \ |(E7T_EXTDBWTH_32BIT< < E7T_EXTDBWTH_DSR2_shift) ) ;\ /* Flash at 0x01800000-0x01880000, 5 cycles, 4 cycles */ ;\ /* .long E7T_ROMCON0 */ ;\ .long ( (E7T_ROMCON_PMC_ROM) \ |(E7T_ROMCON_TPA_5C) \ |(E7T_ROMCON_TACC_4C) \ |((0x01800000 > > 16) < < E7T_ROMCON_BASE_shift) \ |((0x01880000 > > 16) < < E7T_ROMCON_NEXT_shift)) ;\ /* SRAM at 0x00000000-0x00400000, 5 cycles, 2 cycles */ ;\ /* .long E7T_ROMCON1 */ ;\ .long ( (E7T_ROMCON_PMC_ROM) \ |(E7T_ROMCON_TPA_5C) \ |(E7T_ROMCON_TACC_2C) \ |((0x00000000 > > 16) < < E7T_ROMCON_BASE_shift) \ |((0x00040000 > > 16) < < E7T_ROMCON_NEXT_shift)) ;\ /* SRAM at 0x00400000-0x00800000, 5 cycles, 2 cycles */ ;\ /* .long E7T_ROMCON2 */ ;\ .long ( (E7T_ROMCON_PMC_ROM) \ |(E7T_ROMCON_TPA_5C) \ |(E7T_ROMCON_TACC_2C) \ |((0x00040000 > > 16) < < E7T_ROMCON_BASE_shift) \ |((0x00080000 > > 16) < < E7T_ROMCON_NEXT_shift)) ;\ /* Below values are what Boot Monitor sets up */ ;\ /* .long E7T_ROMCON3 */ ;\ .long 0x08018020 ;\ /* .long E7T_ROMCON4 */ ;\ .long 0x0a020040 ;\ /* .long E7T_ROMCON5 */ ;\ .long 0x0c028040 ;\ /* .long E7T_DRAMCON0 */ ;\ .long 0x00000000 ;\ /* .long E7T_DRAMCON1 */ ;\ .long 0x00000000 ;\ /* .long E7T_DRAMCON2 */ ;\ .long 0x00000000 ;\ /* .long E7T_DRAMCON3 */ ;\ .long 0x00000000 ;\ /* .long E7T_REFEXTCON */ ;\ .long 0x9c218360 ;\ ;\ 33: ......... There are some errors in the image's code,for example at 1820058: ldr lr,[pc, #1136] ; 18204d0 < _eCos_id+0x20> Acording the source ,it should be: ldr lr,[pc, #64] ;18200a0 What's wrong ??Did I miss something?My gcc's version is 3.3.1 Thanks very much! twomol twomol@bj1860.net 2004-11-24
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