Re: [ECOS] Memory Map conventions

[Mark Salter <msalter at redhat dot com>]

On Tue, 2005-01-18 at 09:56 -0700, Grant Likely wrote:
> I'm working on a CerfCubePXA port of eCos which uses the Intel PXA255.
>  In my research, I noticed an odd thing with the memory maps on all of
> the eCos PXA ports.
> 
> It appears that the PXA port is directly derived from one of the
> IXP42X ports (The other Intel Xscale).  On the IXP, the physical
> memory map is as follows:
> 
> FLASH based at 0x50000000
> SDRAM based at 0x00000000
> 
> The IXP reset code enables the MMU and inserts one-to-one mappings of
> the physical address to virtual addresses.  In other words, FLASH
> stays at 0x50000000 and SDRAM stays at 0x00000000.

Actually, IXP flash is located at 0x00000000 at reset. The early init
code will switch it to the 0x50000000 physical address.

> 
> On the PXA, the physical memory map is as follows:
> 
> FLASH based at 0x00000000
> SDRAM based at 0xA0000000
> 
> However, the PXA reset code (at least for the uE250) does something
> different.  Rather than a one to one mapping from virtual address to
> physical address, the MMU setup goes through contortions to remap
> SDRAM from 0xA0000000 to 0x00000000 and remap FLASH from 0x00000000 to
> 0x50000000.  This makes the ROM/RAM addresses look the same as on the
> IXP platform.  However, it makes the bootup code complex and the
> current code cannot support ROMRAM images. 

Why wouldn't ROMRAM images work?

>  (In fact, from what I
> understand it doesn't look like ROM images will work properly either
> because I cannot find the copy from ROM to RAM).
> 

Copy of .data sections?

> My question is this:  What is the 'best-practice' for new ecos ports
> where the processor core is the same but the physical memory map has
> changed.  Is it preferred to maintain the physical memory map in the
> MMU mappings?  Or is it preferred to use the MMU to make the virtual
> memory map look the same as other existing ports?
> 

Life is easier if you put RAM at 0x00000000. This allows RedBoot to
write to the cpu exception vectors.

--Mark



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