This is the mail archive of the ecos-discuss@sourceware.org mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: ecos has template for coyote..?


vijay.peshkar@wipro.com wrote:
> Dear Friends,
> 
> I have been using your coyote board with redbood and linux.
> Now I plan to migrate to ecos.
> 
> On running the latest 2.0 ecos configuration tool, I observed that
> there does not exist a template for IXP425 coyote while the 'supported
> hardware' list on ecos (http://ecos.sourceware.org/ecos/hardware.html) 
> confirms that coyote and IXP425 processor is supported.
> Any pointers on how to get the support for coyote onto ecos 'configtool'?

I did this ages ago (and threw it all away since it I no longer had
access to Coyote hardware).  Basically you copy the ixpdp425 support and
change filenames/variable/function names and tweak a few other things.

I've attached the patches for Coyote support I still have lying around.
 I can't provide any further assistance beyond these patches.

David Vrabel
-- 
David Vrabel, Design Engineer

Arcom, Clifton Road           Tel: +44 (0)1223 411200 ext. 3233
Cambridge CB1 7EA, UK         Web: http://www.arcom.com/
Index: packages/devs/eth/arm/grg/i82559/current/ChangeLog
===================================================================
RCS file: /var/cvs/ecos/packages/devs/eth/arm/grg/i82559/current/ChangeLog,v
retrieving revision 1.1.1.1
retrieving revision 1.3
diff -u -B -p -r1.1.1.1 -r1.3
--- packages/devs/eth/arm/grg/i82559/current/ChangeLog	29 May 2003 10:52:37 -0000	1.1.1.1
+++ packages/devs/eth/arm/grg/i82559/current/ChangeLog	18 Nov 2003 14:58:38 -0000	1.3
@@ -1,3 +1,13 @@
+2003-11-18  David Vrabel  <dvrabel@arcom.com>
+
+	* include/grg_i82559.inl: The RedBoot flash config default values
+	for ESAs are stored as pointers to the default value.
+
+2003-09-30  David Vrabel  <dvrabel@arcom.com>
+
+	* cdl/grg_i82559_eth_driver.cdl: The Intel GRG and ADI Coyote
+	I82559 ethernet drivers are identical.
+
 2003-03-26  Mark Salter  <msalter@redhat.com>
 
 	* cdl/grg_i82559_eth_driver.cdl: Default to off for
Index: packages/devs/eth/arm/grg/i82559/current/cdl/grg_i82559_eth_driver.cdl
===================================================================
RCS file: /var/cvs/ecos/packages/devs/eth/arm/grg/i82559/current/cdl/grg_i82559_eth_driver.cdl,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -B -p -r1.1.1.1 -r1.2
--- packages/devs/eth/arm/grg/i82559/current/cdl/grg_i82559_eth_driver.cdl	29 May 2003 10:52:37 -0000	1.1.1.1
+++ packages/devs/eth/arm/grg/i82559/current/cdl/grg_i82559_eth_driver.cdl	30 Sep 2003 12:50:31 -0000	1.2
@@ -3,7 +3,7 @@
 #       grg_i82559_eth_driver.cdl
 #
 #       Ethernet driver
-#       GRG and Intel PRO/100+ platform specific support
+#       Intel GRG or ADI Coyote with Intel PRO/100+ platform specific support
 #
 # ====================================================================
 #####ECOSGPLCOPYRIGHTBEGIN####
@@ -51,10 +51,10 @@
 # ====================================================================
 
 cdl_package CYGPKG_DEVS_ETH_ARM_GRG_I82559 {
-    display       "GRG with Intel PRO/100+ (PCI) ethernet driver"
+    display       "Intel GRG or ADI Coyote with Intel PRO/100+ (PCI) ethernet driver"
     parent        CYGPKG_IO_ETH_DRIVERS
     active_if     CYGPKG_IO_ETH_DRIVERS
-    active_if     CYGPKG_HAL_ARM_XSCALE_GRG
+    active_if     { CYGPKG_HAL_ARM_XSCALE_GRG || CYGPKG_HAL_ARM_XSCALE_COYOTE }
 
     include_dir   cyg/io
 
@@ -74,12 +74,12 @@ cdl_package CYGPKG_DEVS_ETH_ARM_GRG_I825
 
 
     cdl_component CYGPKG_DEVS_ETH_ARM_GRG_I82559_ETH0 {
-        display       "GRG ethernet port driver for an I82559-based ethernet NIC card"
+        display       "Intel GRG or ADI Coyote I82559-based ethernet NIC card driver"
         flavor        bool
         default_value 1
         description   "
-            This option includes the GRG ethernet device driver for a
-            I82559-based ethernet PCI card."
+            This option includes the Intel GRG or ADI Coyote ethernet device
+            driver for an I82559-based ethernet PCI card."
 
         implements CYGHWR_NET_DRIVERS
         implements CYGHWR_NET_DRIVER_ETH0
Index: packages/devs/eth/arm/grg/i82559/current/include/grg_i82559.inl
===================================================================
RCS file: /var/cvs/ecos/packages/devs/eth/arm/grg/i82559/current/include/grg_i82559.inl,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -B -p -r1.1.1.1 -r1.2
--- packages/devs/eth/arm/grg/i82559/current/include/grg_i82559.inl	29 May 2003 10:52:37 -0000	1.1.1.1
+++ packages/devs/eth/arm/grg/i82559/current/include/grg_i82559.inl	18 Nov 2003 14:58:38 -0000	1.2
@@ -157,7 +157,7 @@ i82559_sc_array[CYGNUM_DEVS_ETH_INTEL_I8
 RedBoot_config_option("Network hardware address [MAC] for eth0",
                       eth0_esa,
                       ALWAYS_ENABLED, true,
-                      CONFIG_ESA, i82559_eth0_priv_data.mac_address
+                      CONFIG_ESA, &i82559_eth0_priv_data.mac_address
     );
 #endif
 
Index: packages/devs/flash/arm/grg/current/ChangeLog
===================================================================
RCS file: /var/cvs/ecos/packages/devs/flash/arm/grg/current/ChangeLog,v
retrieving revision 1.1.1.2
retrieving revision 1.3
diff -u -B -p -r1.1.1.2 -r1.3
--- packages/devs/flash/arm/grg/current/ChangeLog	14 Oct 2004 10:53:58 -0000	1.1.1.2
+++ packages/devs/flash/arm/grg/current/ChangeLog	14 Oct 2004 13:23:44 -0000	1.3
@@ -2,6 +2,14 @@
 
 	* include/grg_strataflash.inl: Add little-endian support.
 
+2003-09-39  David Vrabel  <dvrabel@arcom.com>
+
+	* cdl/flash_grg.cdl: The flash on the Intel GRG and the ADI Coyote is
+	identical.
+
+	* src/devs_flash_arm_grg.c: Add a flash device table entry for this
+	flash device.
+	
 2003-03-24  Mark Salter  <msalter@redhat.com>
 
 	* cdl/flash_grg.cdl: Fix copyright notice.
Index: packages/devs/flash/arm/grg/current/cdl/flash_grg.cdl
===================================================================
RCS file: /var/cvs/ecos/packages/devs/flash/arm/grg/current/cdl/flash_grg.cdl,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -B -p -r1.1.1.1 -r1.2
--- packages/devs/flash/arm/grg/current/cdl/flash_grg.cdl	29 May 2003 10:52:52 -0000	1.1.1.1
+++ packages/devs/flash/arm/grg/current/cdl/flash_grg.cdl	30 Sep 2003 12:19:42 -0000	1.2
@@ -2,7 +2,7 @@
 #
 #      flash_grg.cdl
 #
-#      FLASH memory - Hardware support on GRG board
+#      FLASH memory - Hardware support on Intel GRG or ADI Coyote board
 #
 # ====================================================================
 #####ECOSGPLCOPYRIGHTBEGIN####
@@ -50,17 +50,19 @@
 # ====================================================================
 
 cdl_package CYGPKG_DEVS_FLASH_GRG {
-    display       "GRG board FLASH memory support"
+    display       "Intel GRG or ADI Coyote FLASH memory support"
 
     parent        CYGPKG_IO_FLASH
     active_if     CYGPKG_IO_FLASH
-    requires      CYGPKG_HAL_ARM_XSCALE_GRG
+    requires      { CYGPKG_HAL_ARM_XSCALE_GRG || CYGPKG_HAL_ARM_XSCALE_COYOTE }
     requires      CYGPKG_DEVS_FLASH_STRATA
 
     implements    CYGHWR_IO_FLASH_BLOCK_LOCKING
 
     include_dir   cyg/io
 
+    compile       -library=libextras.a devs_flash_arm_grg.c
+
     # Arguably this should do in the generic package
     # but then there is a logic loop so you can never enable it.
     cdl_interface CYGINT_DEVS_FLASH_STRATA_REQUIRED {
Index: packages/devs/flash/arm/grg/current/src/devs_flash_arm_grg.c
===================================================================
RCS file: packages/devs/flash/arm/grg/current/src/devs_flash_arm_grg.c
diff -N packages/devs/flash/arm/grg/current/src/devs_flash_arm_grg.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/devs/flash/arm/grg/current/src/devs_flash_arm_grg.c	30 Sep 2003 12:19:42 -0000	1.1
@@ -0,0 +1,6 @@
+#include <cyg/io/flash.h>
+
+/* FIXME: This shouldn't be here really... */
+extern int strata_flash_query(struct cyg_flashdevtab_entry *tab);
+
+FLASHDEVTAB_ENTRY(hal_arm_grg_flashdev_entry, "flash", &strata_flash_query, 0);
Index: packages/hal/arm/xscale/coyote/current/ChangeLog
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/ChangeLog
diff -N packages/hal/arm/xscale/coyote/current/ChangeLog
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/ChangeLog	4 Dec 2003 10:10:14 -0000	1.5
@@ -0,0 +1,18 @@
+2003-12-04  David Vrabel  <dvrabel@arcom.com>
+
+	* misc/redboot_ROM.ecm, misc/redboot_RAM.ecm: Enable peek and poke
+	commands.  Removed options that are no longer valid.
+	
+2003-10-28  David Vrabel  <dvrabel@arcom.com>
+
+	* misc/redboot_ROM.ecm, misc/redboot_RAM.ecm: Uses NPE ethernet
+	driver.
+
+2003-09-29  David Vrabel  <dvrabel@arcom.com>
+
+	* All: New board package for the ADI Coyote Residential Gateway
+	copied from the Intel Generic Residential Gateway (grg) package.
+	Changed "grg" -> "coyote" (etc.) where appropriate.
+
+	Applied ADI's patch to convert a grg package into one suitable for
+	the ADI Coyote (with 64 Mibyte of SDRAM).
Index: packages/hal/arm/xscale/coyote/current/cdl/hal_arm_xscale_coyote.cdl
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/cdl/hal_arm_xscale_coyote.cdl
diff -N packages/hal/arm/xscale/coyote/current/cdl/hal_arm_xscale_coyote.cdl
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/cdl/hal_arm_xscale_coyote.cdl	29 Sep 2003 15:17:06 -0000	1.2
@@ -0,0 +1,301 @@
+# ====================================================================
+#
+#      hal_arm_xscale_coyote.cdl
+#
+#      ADI Coyote Residential Gateway HAL package
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s):      msalter
+# Contributors:   msalter
+# Date:           2003-02-05
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+cdl_package CYGPKG_HAL_ARM_XSCALE_COYOTE {
+    display       "ADI Coyote Residential Gateway"
+    parent        CYGPKG_HAL_ARM_XSCALE
+    implements    CYGINT_HAL_ARM_BIGENDIAN
+    hardware
+    include_dir   cyg/hal
+    define_header hal_arm_xscale_coyote.h
+    description   "
+        This HAL platform package provides support for
+        ADI's Coyote Residential Gateway."
+
+    compile       coyote_misc.c coyote_pci.c
+
+    define_proc {
+        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_arm.h>"
+        puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H  <pkgconf/hal_arm_xscale_ixp425.h>"
+        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_xscale_coyote.h>"
+        puts $::cdl_header "#define CYGBLD_HAL_PLF_INTS_H <cyg/hal/hal_plf_ints.h>"
+	puts $::cdl_header "#define HAL_PLATFORM_CPU    \"XScale\""
+        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"ADI Coyote Residential Gateway\""
+        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
+        puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE  290"
+    }
+
+    cdl_component CYG_HAL_STARTUP {
+        display       "Startup type"
+        flavor        data
+        default_value {"RAM"}
+        legal_values  {"RAM" "ROM"}
+	no_define
+	define -file system.h CYG_HAL_STARTUP
+        description   "
+           When targeting the Coyote board it is possible to configure the
+           system for either RAM bootstrap or ROM bootstrap(s). Select 'RAM'
+           when building programs to load into RAM using onboard debug software
+           such as RedBoot or eCos GDB stubs."
+    }
+
+    cdl_component CYGBLD_GLOBAL_OPTIONS {
+        display "Global build options"
+        flavor  none
+        no_define
+        description   "
+	    Global build options including control over
+	    compiler flags, linker flags and choice of toolchain."
+
+        parent  CYGPKG_NONE
+
+        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
+            display "Global command prefix"
+            flavor  data
+            no_define
+            default_value { "arm-elf" }
+            description "
+                This option specifies the command prefix used when
+                invoking the build tools."
+        }
+
+        cdl_option CYGBLD_GLOBAL_CFLAGS {
+            display "Global compiler flags"
+            flavor  data
+            no_define
+            default_value { "-mcpu=xscale -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority -mapcs-frame" }
+            description   "
+                This option controls the global compiler flags which are used to
+                compile all packages by default. Individual packages may define
+                options which override these global flags."
+        }
+
+        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+            display "Global linker flags"
+            flavor  data
+            no_define
+            default_value { "-mcpu=xscale -mbig-endian -Wl,--gc-sections -Wl,-static -g -O2 -nostdlib" }
+            description   "
+                This option controls the global linker flags. Individual
+                packages may define options which override these global flags."
+        }
+
+        cdl_option CYGBLD_BUILD_GDB_STUBS {
+            display "Build GDB stub ROM image"
+            default_value 0
+            requires { CYG_HAL_STARTUP == "ROM" }
+            requires CYGSEM_HAL_ROM_MONITOR
+            requires CYGBLD_BUILD_COMMON_GDB_STUBS
+            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
+            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
+            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
+            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
+            no_define
+            description "
+                This option enables the building of the GDB stubs for the
+                board. The common HAL controls takes care of most of the
+                build process, but the final conversion from ELF image to
+                binary data is handled by the platform CDL, allowing
+                relocation of the data if necessary."
+
+            make -priority 320 {
+                <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img
+                $(OBJCOPY) --remove-section=.fixed_vectors -O binary $< $@
+            }
+        }
+    }
+
+    cdl_component CYGPKG_HAL_ARM_XSCALE_COYOTE_OPTIONS {
+        display "ADI Coyote build options"
+        flavor  none
+        no_define
+        description   "
+	    Package specific build options including control over
+	    compiler flags used only in building this package,
+	    and details of which tests are built."
+
+        cdl_option CYGPKG_HAL_ARM_XSCALE_COYOTE_CFLAGS_ADD {
+            display "Additional compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the ADI Coyote HAL. These flags are used in addition
+                to the set of global flags."
+        }
+
+        cdl_option CYGPKG_HAL_ARM_XSCALE_COYOTE_CFLAGS_REMOVE {
+            display "Suppressed compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the ADI Coyote HAL. These flags are removed from
+                the set of global flags if present."
+        }
+
+	cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {
+            display       "Number of breakpoints supported by the HAL."
+            flavor        data
+            default_value 32
+            description   "
+                This option determines the number of breakpoints supported
+                by the HAL."
+        }
+    }
+
+    cdl_option CYGSEM_HAL_IXP425_PLF_USES_UART1 {
+        display       "ADI Coyote uses IXP425 high-speed UART"
+        flavor        bool
+        default_value 0
+        description   "
+            Enable this option if the IXP425 high-speed UART is used
+            as a virtual vector communications channel."
+    }
+
+    cdl_option CYGSEM_HAL_IXP425_PLF_USES_UART2 {
+        display       "ADI Coyote uses IXP425 console UART"
+        flavor        bool
+        default_value 1
+        description   "
+            Enable this option if the IXP425 console UART is to be used
+	    as a virtual vector communications channel."
+    }
+
+    cdl_component CYGHWR_MEMORY_LAYOUT {
+        display "Memory layout"
+        flavor data
+        no_define
+        calculated { CYG_HAL_STARTUP == "RAM" ? "arm_xscale_coyote_ram" : \
+	                                        "arm_xscale_coyote_rom" }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
+            display "Memory layout linker script fragment"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
+            calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_xscale_coyote_ram.ldi>" : \
+						    "<pkgconf/mlt_arm_xscale_coyote_rom.ldi>" }
+        }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_H {
+            display "Memory layout header file"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_H
+            calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_xscale_coyote_ram.h>" : \
+                                                    "<pkgconf/mlt_arm_xscale_coyote_rom.h>" }
+        }
+    }
+
+    cdl_option CYGSEM_HAL_ROM_MONITOR {
+        display       "Behave as a ROM monitor"
+        flavor        bool
+        default_value 0
+        parent        CYGPKG_HAL_ROM_MONITOR
+        requires      { CYG_HAL_STARTUP == "ROM" }
+        description   "
+            Enable this option if this program is to be used as a ROM monitor,
+            i.e. applications will be loaded into RAM on the board, and this
+            ROM monitor may process exceptions or interrupts generated from the
+            application. This enables features such as utilizing a separate
+            interrupt stack when exceptions are generated."
+    }
+
+    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+         display       "Work with a ROM monitor"
+         flavor        booldata
+         legal_values  { "Generic" "GDB_stubs" }
+         default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
+         parent        CYGPKG_HAL_ROM_MONITOR
+         requires      { CYG_HAL_STARTUP == "RAM" }
+         description   "
+             Support can be enabled for different varieties of ROM monitor.
+             This support changes various eCos semantics such as the encoding
+             of diagnostic output, or the overriding of hardware interrupt
+             vectors.
+             Firstly there is \"Generic\" support which prevents the HAL
+             from overriding the hardware vectors that it does not use, to
+             instead allow an installed ROM monitor to handle them. This is
+             the most basic support which is likely to be common to most
+             implementations of ROM monitor.
+             \"GDB_stubs\" provides support when GDB stubs are included in
+             the ROM monitor or boot ROM."
+     }
+
+    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
+        display       "Redboot HAL options"
+        flavor        none
+        no_define
+        parent        CYGPKG_REDBOOT
+        active_if     CYGPKG_REDBOOT
+        description   "
+            This option lists the target's requirements for a valid Redboot
+            configuration."
+
+        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
+            display       "Build Redboot ROM binary image"
+            active_if     CYGBLD_BUILD_REDBOOT
+            default_value 1
+            no_define
+            description "This option enables the conversion of the Redboot ELF
+                         image to a binary image suitable for ROM programming."
+
+            make -priority 325 {
+                <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf
+                $(OBJCOPY) --strip-debug $< $(@:.bin=.img) 
+                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
+                $(OBJCOPY) -O binary $< $@
+            }
+        }
+    }
+}
Index: packages/hal/arm/xscale/coyote/current/include/coyote.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/coyote.h
diff -N packages/hal/arm/xscale/coyote/current/include/coyote.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/coyote.h	29 Sep 2003 15:27:13 -0000	1.3
@@ -0,0 +1,122 @@
+#ifndef CYGONCE_HAL_ARM_XSCALE_COYOTE_COYOTE_H
+#define CYGONCE_HAL_ARM_XSCALE_COYOTE_COYOTE_H
+
+/*=============================================================================
+//
+//      coyote.h
+//
+//      Platform specific support (register layout, etc)
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-02-05
+// Purpose:      ADI Coyote specific support routines
+// Description: 
+// Usage:        #include <cyg/hal/coyote.h>
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#include <pkgconf/system.h>
+#include CYGHWR_MEMORY_LAYOUT_H
+#include <pkgconf/hal_arm_xscale_coyote.h>
+#include <cyg/hal/hal_ixp425.h>
+
+// These must match setup in the page table in hal_platform_extras.h
+#define SDRAM_PHYS_BASE                    0x00000000
+#define SDRAM_BASE                         0x00000000
+#define SDRAM_UNCACHED_BASE                0x10000000
+#define SDRAM_SIZE                         0x04000000  // 64MB
+
+// CS0 (flash optimum timing)
+#define IXP425_EXP_CS0_INIT \
+ (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+  EXP_RECOVERY_T(15) | EXP_SZ_16M | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN)
+
+// CS1 (flash optimum timing for optional socket)
+#define IXP425_EXP_CS1_INIT \
+ (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+  EXP_RECOVERY_T(15) | EXP_SZ_16M | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN)
+
+// CS3 (IDE/Parallel - PIO Mode 3/4 Setting)
+#define IXP425_EXP_CS3_INIT \
+ (EXP_ADDR_T(0) | EXP_SETUP_T(0) | EXP_STROBE_T(2) | EXP_HOLD_T(0) | \
+  EXP_RECOVERY_T(0) | EXP_SZ_1K | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN)
+
+#define IXP425_SDRAM_CONFIG_INIT  (SDRAM_CONFIG_CAS_3 | SDRAM_CONFIG_2x16Mx16)
+#define IXP425_SDRAM_REFRESH_CNT  0x81A
+#define IXP425_SDRAM_SET_MODE_CMD SDRAM_IR_MODE_SET_CAS3
+
+
+// ------------------------------------------------------------------------
+// GPIO lines
+//
+#define GPIO_PWR_FAIL_IRQ_N 0
+#define GPIO_DSL_IRQ_N      1
+#define GPIO_SLIC_A_IRQ_N   2
+#define GPIO_SLIC_B_IRQ_N   3
+#define GPIO_DSP_IRQ_N      4
+#define GPIO_IDE_IRQ_N      5
+
+// GPIO lines used for SPI bus
+#define GPIO_SPI_CS1_N      7
+#define GPIO_SPI_CS0_N      8
+#define GPIO_SPI_SCK        9
+#define GPIO_SPI_SDI       10
+#define GPIO_SPI_SDO       13
+
+#define GPIO_IO_RESET_N    12
+
+// ------------------------------------------------------------------------
+// No Hex Display
+//
+#ifdef __ASSEMBLER__
+        // Display hex digits in 'value' not masked by 'mask'.
+	.macro DISPLAY value, reg0, reg1
+	.endm
+#else
+static inline void HEX_DISPLAY(int value)
+{
+}
+#endif // __ASSEMBLER__
+
+// ------------------------------------------------------------------------
+
+#endif // CYGONCE_HAL_ARM_XSCALE_COYOTE_COYOTE_H
Index: packages/hal/arm/xscale/coyote/current/include/hal_platform_extras.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/hal_platform_extras.h
diff -N packages/hal/arm/xscale/coyote/current/include/hal_platform_extras.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/hal_platform_extras.h	29 Sep 2003 15:27:13 -0000	1.2
@@ -0,0 +1,247 @@
+#ifndef CYGONCE_HAL_PLATFORM_EXTRAS_H
+#define CYGONCE_HAL_PLATFORM_EXTRAS_H
+
+/*=============================================================================
+//
+//      hal_platform_extras.h
+//
+//      Platform specific MMU table.
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2002-12-08
+// Purpose:      Intel XScale Generic Residential Platform specific mmu table
+// Description: 
+// Usage:        #include <cyg/hal/hal_platform_extras.h>
+//     Only used by "vectors.S"         
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
+#if defined(CYG_HAL_STARTUP_ROMRAM)
+        .section .text
+	.ltorg
+	.p2align 13
+#else
+        .section .mmu_tables, "a"
+#endif
+
+    mmu_table:
+        //  This page table sets up the preferred mapping:
+        //
+        //  Virtual Address   Physical Address  XCB  Size (MB)  Description
+        //  ---------------   ----------------  ---  ---------  -----------
+        //     0x00000000       0x00000000      010      64     SDRAM (cached)
+        //     0x10000000       0x10000000      000      64     SDRAM (alias)
+        //     0x20000000       0x00000000      000      64     SDRAM (uncached)
+        //     0x48000000       0x48000000      000      64     PCI Data
+        //     0x50000000       0x50000000      010      16     Flash (CS0)
+        //     0x51000000       0x51000000      010      16     Flash (CS1)
+        //     0x52000000       0x52000000      000      16     CS2 (unused)
+        //     0x53000000       0x53000000      010      16     IDE (CS3)
+        //     0x54000000       0x54000000      000      16     CS4 (unused)
+        //     0x55000000       0x55000000      000      16     CS5 (unused)
+        //     0x56000000       0x56000000      000      16     CS6 (unused)
+        //     0x57000000       0x57000000      000      16     CS7 (unused)
+	//     0x60000000       0x60000000      000      64     Queue Manager
+	//     0xC0000000       0xC0000000      000       1     PCI Controller
+	//     0xC4000000       0xC4000000      000       1     Exp. Bus Config
+	//     0xC8000000       0xC8000000      000       1     Misc IXP425 IO
+	//     0xCC000000       0xCC000000      000       1     SDRAM Config
+
+	// 64MB SDRAM
+	.set	__base,0x000
+	.rept	0x040 - 0x000
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// 192MB Unused
+	.rept	0x100 - 0x040
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB SDRAM Alias
+	.rept	0x140 - 0x100
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// 192MB Unused
+	.rept	0x200 - 0x140
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB SDRAM (uncached)
+	.set	__base,0x000
+	.rept	0x240 - 0x200
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 192MB Unused
+	.set	__base,0x240
+	.rept	0x300 - 0x240
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 384MB Unused
+	.rept	0x480 - 0x300
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB PCI Data
+	.rept	0x4C0 - 0x480
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB Unused
+	.rept	0x500 - 0x4C0
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 16MB Flash  (Expansion bus CS0)
+	.rept	0x510 - 0x500
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// 16MB Flash  (Expansion bus CS1)
+	.rept	0x520 - 0x510
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// Expansion bus CS2 (Not used)
+	.rept	0x530 - 0x520
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 16MB Flash  (Expansion bus CS3)
+	.rept	0x540 - 0x530
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+	
+	// Rest of Expansion bus (CS4-CS7)
+	.rept	0x600 - 0x540
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB Queue Manager
+	.rept	0x640 - 0x600
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 1472MB Unused
+	.rept	0xC00 - 0x640
+	.word 0
+	.set	__base,__base+1
+	.endr
+  
+	// 1MB PCI Controller
+	.rept	0xC01 - 0xC00
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xC40 - 0xC01
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB Expansion bus config
+	.rept	0xC41 - 0xC40
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xC80 - 0xC41
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB Misc IO
+	.rept	0xC81 - 0xC80
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xCC0 - 0xC81
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB SDRAM Config
+	.rept	0xCC1 - 0xCC0
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xD00 - 0xCC1
+	.word 0
+	.set	__base,__base+1
+	.endr
+                  
+	// Rest is Unused
+	.rept	0x1000 - 0xD00
+        .word 0
+	.set	__base,__base+1
+	.endr
+
+#endif /* defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) */
+
+/*---------------------------------------------------------------------------*/
+/* end of hal_platform_extras.h                                              */
+#endif /* CYGONCE_HAL_PLATFORM_EXTRAS_H */
Index: packages/hal/arm/xscale/coyote/current/include/hal_platform_setup.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/hal_platform_setup.h
diff -N packages/hal/arm/xscale/coyote/current/include/hal_platform_setup.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/hal_platform_setup.h	29 Sep 2003 15:17:06 -0000	1.2
@@ -0,0 +1,304 @@
+#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
+#define CYGONCE_HAL_PLATFORM_SETUP_H
+
+/*=============================================================================
+//
+//      hal_platform_setup.h
+//
+//      Platform specific support for HAL (assembly code)
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-02-06
+// Purpose:      ADI Coyote specific support routines
+// Description: 
+// Usage:        #include <cyg/hal/hal_platform_setup.h>
+//     Only used by "vectors.S"         
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#include <pkgconf/system.h>             // System-wide configuration info
+#include CYGBLD_HAL_VARIANT_H           // Variant specific configuration
+#include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration
+#include <cyg/hal/hal_ixp425.h>         // Variant specific hardware definitions
+#include <cyg/hal/hal_mmu.h>            // MMU definitions
+#include <cyg/hal/hal_mm.h>             // more MMU definitions
+#include <cyg/hal/coyote.h>                // Platform specific hardware definitions
+
+#if defined(CYG_HAL_STARTUP_ROM)
+#define PLATFORM_SETUP1  _platform_setup1
+#define PLATFORM_EXTRAS  <cyg/hal/hal_platform_extras.h>
+#define CYGHWR_HAL_ARM_HAS_MMU
+
+// ------------------------------------------------------------------------
+// Define macro used to diddle the LEDs during early initialization.
+// Can use r0+r1.  Argument in \x.
+#define CYGHWR_LED_MACRO
+
+// Delay a bit
+.macro DELAY cycles, reg0
+#if 0
+    ldr     \reg0, =\cycles
+    subs    \reg0, \reg0, #1
+    subne   pc,  pc, #0xc
+#endif
+.endm
+
+// ------------------------------------------------------------------------
+// This macro represents the initial startup code for the platform        
+	.macro _platform_setup1
+
+#if CYGINT_HAL_ARM_BIGENDIAN
+        // set big-endian
+	mrc	p15, 0, r0, c1, c0, 0
+        orr	r0, r0, #0x80
+	mcr	p15, 0, r0, c1, c0, 0
+        CPWAIT  r0
+#endif
+
+        ldr     r0,=(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
+        msr     cpsr, r0
+
+	// invalidate I & D caches & BTB
+	mcr	p15, 0, r0, c7, c7, 0
+	CPWAIT	r0
+
+	// invalidate I & Data TLB
+        mcr 	p15, 0, r0, c8, c7, 0
+        CPWAIT r0
+
+	// drain write and fill buffers
+	mcr	p15, 0, r0, c7, c10, 4
+	CPWAIT	r0
+
+	// disable write buffer coalescing
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #1
+	mcr	p15, 0, r0, c1, c0, 1
+	CPWAIT	r0
+		
+        // Setup chip selects
+        ldr     r1, =IXP425_EXP_CFG_BASE
+#ifdef IXP425_EXP_CS0_INIT
+	ldr	r0, =IXP425_EXP_CS0_INIT
+	str     r0, [r1, #IXP425_EXP_CS0]
+#endif
+#ifdef IXP425_EXP_CS1_INIT
+	ldr	r0, =IXP425_EXP_CS1_INIT
+	str     r0, [r1, #IXP425_EXP_CS1]
+#endif
+#ifdef IXP425_EXP_CS2_INIT
+	ldr	r0, =IXP425_EXP_CS2_INIT
+	str     r0, [r1, #IXP425_EXP_CS2]
+#endif
+#ifdef IXP425_EXP_CS3_INIT
+	ldr	r0, =IXP425_EXP_CS3_INIT
+	str     r0, [r1, #IXP425_EXP_CS3]
+#endif
+#ifdef IXP425_EXP_CS4_INIT
+	ldr	r0, =IXP425_EXP_CS4_INIT
+	str     r0, [r1, #IXP425_EXP_CS4]
+#endif
+#ifdef IXP425_EXP_CS5_INIT
+	ldr	r0, =IXP425_EXP_CS5_INIT
+	str     r0, [r1, #IXP425_EXP_CS5]
+#endif
+#ifdef IXP425_EXP_CS6_INIT
+	ldr	r0, =IXP425_EXP_CS6_INIT
+	str     r0, [r1, #IXP425_EXP_CS6]
+#endif
+#ifdef IXP425_EXP_CS7_INIT
+	ldr	r0, =IXP425_EXP_CS7_INIT
+	str     r0, [r1, #IXP425_EXP_CS7]
+#endif
+
+	// Enable the Icache
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_I
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT  r0
+
+        // Setup SDRAM controller
+
+        ldr     r0, =IXP425_SDRAM_CFG_BASE
+
+	ldr 	r1, =IXP425_SDRAM_CONFIG_INIT
+	str     r1, [r0, #IXP425_SDRAM_CONFIG]
+
+	// disable refresh cycles
+	mov 	r1, #0
+	str	r1, [r0, #IXP425_SDRAM_REFRESH]
+
+	// send nop command
+	mov 	r1, #SDRAM_IR_NOP
+	str	r1, [r0, #IXP425_SDRAM_IR]
+        DELAY   0x10000, r1
+	
+	// set SDRAM internal refresh val
+	ldr	r1, =IXP425_SDRAM_REFRESH_CNT
+	str	r1, [r0, #IXP425_SDRAM_REFRESH]
+	DELAY   0x10000, r1
+
+	// send precharge-all command to close all open banks
+	mov     r1, #SDRAM_IR_PRECHARGE
+	str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+	// provide 8 auto-refresh cycles
+	mov     r1, #SDRAM_IR_AUTO_REFRESH
+	mov     r2, #8
+  1:
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x800, r3
+	subs	r2, r2, #1
+	bne	1b
+
+	// set mode register in sdram
+	mov	r1, #IXP425_SDRAM_SET_MODE_CMD
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+	// start normal operation
+	mov	r1, #SDRAM_IR_NORMAL
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+	// value to load into pc to jump to real runtime address
+	ldr     r0, =1f
+
+	// Setup EXP_CNFG0 value to switch EXP bus out of low memory
+	ldr 	r2, =IXP425_EXP_CFG_BASE
+	ldr     r1, [r2, #IXP425_EXP_CNFG0]
+	bic     r1, r1, #EXP_CNFG0_MEM_MAP
+
+	b       icache_boundary
+	.p2align 5
+icache_boundary:
+	// Here is where we switch from boot address (0x000000000) to the
+	// actual flash runtime address. We align to cache boundary so we
+        // execute from cache during the switchover. Cachelines are 8 words.
+        str     r1, [r2, #IXP425_EXP_CNFG0]    // make the EXP bus switch
+	nop
+        nop
+        nop
+        nop
+        mov     pc, r0
+        nop
+                            // display FFFF and loop forever.
+    0:  b       0b
+    1:
+
+	// Move mmu tables into RAM so page table walks by the cpu
+	// don't interfere with FLASH programming.
+	ldr	r0, =mmu_table
+	add     r2, r0, #0x4000     	// End of tables
+	mov	r1, #SDRAM_PHYS_BASE
+	orr	r1, r1, #0x4000		// RAM tables
+
+	// everything can go as-is
+    1:
+	ldr	r3, [r0], #4
+	str	r3, [r1], #4
+	cmp	r0, r2
+	bne	1b
+
+        mcr     p15, 0, r0, c7, c10, 4  // drain the write & fill buffers
+        CPWAIT  r0
+
+	// Set the TTB register to DRAM mmu_table
+	ldr	r0, =(SDRAM_PHYS_BASE | 0x4000) // RAM tables
+	mcr	p15, 0, r0, c2, c0, 0		// load page table pointer
+	CPWAIT  r0
+
+        // enable permission checks in all domains
+        ldr     r0, =0x55555555
+        mcr     p15, 0, r0, c3, c0, 0
+        CPWAIT  r0
+
+        // enable mmu
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_M
+	orr	r0, r0, #MMU_Control_R
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT	r0
+
+        // enable D cache
+        mrc     p15, 0, r0, c1, c0, 0
+        orr     r0, r0, #MMU_Control_C
+        mcr     p15, 0, r0, c1, c0, 0
+        CPWAIT  r0
+
+        // Enable branch target buffer
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_BTB
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT  r0
+
+        mcr     p15, 0, r0, c7, c10, 4  // drain the write & fill buffers
+        CPWAIT  r0
+
+        mcr     p15, 0, r0, c7, c7, 0   // flush Icache, Dcache and BTB
+        CPWAIT  r0
+
+        mcr     p15, 0, r0, c8, c7, 0   // flush instuction and data TLBs
+        CPWAIT  r0
+
+	mcr	p15, 0, r0, c7, c10, 4	// drain the write & fill buffers
+	CPWAIT r0	
+	
+        // save SDRAM size
+        ldr     r1, =hal_dram_size  /* [see hal_intr.h] */
+        mov     r8, #SDRAM_SIZE
+        str     r8, [r1]
+
+	.endm    // _platform_setup1
+
+#else // defined(CYG_HAL_STARTUP_ROM)
+#define PLATFORM_SETUP1
+#endif
+
+#define PLATFORM_VECTORS         _platform_vectors
+        .macro  _platform_vectors
+        .endm                                        
+
+/*---------------------------------------------------------------------------*/
+/* end of hal_platform_setup.h                                               */
+#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
Index: packages/hal/arm/xscale/coyote/current/include/hal_plf_ints.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/hal_plf_ints.h
diff -N packages/hal/arm/xscale/coyote/current/include/hal_plf_ints.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/hal_plf_ints.h	29 Sep 2003 14:49:41 -0000	1.1
@@ -0,0 +1,86 @@
+#ifndef CYGONCE_HAL_PLF_INTS_H
+#define CYGONCE_HAL_PLF_INTS_H
+//==========================================================================
+//
+//      hal_plf_ints.h
+//
+//      HAL Platform Interrupt support
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2002-07-15
+// Purpose:      Define Interrupt support
+// Description:  The interrupt details for a specific platform is defined here.
+// Usage:
+//              
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+// start with variant ints
+#include CYGBLD_HAL_VAR_INTS_H
+
+#define CYGNUM_HAL_INTERRUPT_PWR_FAIL CYGNUM_HAL_INTERRUPT_GPIO0
+#define CYGNUM_HAL_INTERRUPT_DSL      CYGNUM_HAL_INTERRUPT_GPIO1
+#define CYGNUM_HAL_INTERRUPT_SLIC_A   CYGNUM_HAL_INTERRUPT_GPIO2
+#define CYGNUM_HAL_INTERRUPT_SLIC_B   CYGNUM_HAL_INTERRUPT_GPIO3
+#define CYGNUM_HAL_INTERRUPT_DSP      CYGNUM_HAL_INTERRUPT_GPIO4
+#define CYGNUM_HAL_INTERRUPT_IDE      CYGNUM_HAL_INTERRUPT_GPIO5
+
+
+// NB: Commented out because of errata on reset function of watchdog timer
+//
+#if 0
+#define HAL_PLATFORM_RESET()                                          \
+    CYG_MACRO_START                                                   \
+    cyg_uint32 __ctrl;                                                \
+    /* By disabling interupts we will just hang in the loop below */  \
+    /* if for some reason the software reset fails.               */  \
+    HAL_DISABLE_INTERRUPTS(__ctrl);                                   \
+    *IXP425_OST_WDOG_KEY = 0x482e;                                    \
+    *IXP425_OST_WDOG = 10;                                            \
+    *IXP425_OST_WDOG_ENA = 5;                                         \
+    for(;;); /* hang here forever if reset fails */                   \
+    CYG_MACRO_END
+#else
+#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
+#endif
+
+#endif // CYGONCE_HAL_PLF_INTS_H
Index: packages/hal/arm/xscale/coyote/current/include/plf_io.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/plf_io.h
diff -N packages/hal/arm/xscale/coyote/current/include/plf_io.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/plf_io.h	29 Sep 2003 15:17:06 -0000	1.2
@@ -0,0 +1,64 @@
+#ifndef CYGONCE_PLF_IO_H
+#define CYGONCE_PLF_IO_H
+
+//=============================================================================
+//
+//      plf_io.h
+//
+//      Platform specific IO support
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-02-05
+// Purpose:      ADI Coyote IO support macros
+// Description: 
+// Usage:        #include <cyg/hal/plf_io.h>
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <pkgconf/hal.h>
+#include <cyg/hal/hal_io.h>             // IO macros
+#include <cyg/hal/coyote.h>
+#include CYGBLD_HAL_PLF_INTS_H
+
+//-----------------------------------------------------------------------------
+// end of plf_io.h
+#endif // CYGONCE_PLF_IO_H
Index: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.h
diff -N packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.h	29 Sep 2003 15:27:13 -0000	1.2
@@ -0,0 +1,18 @@
+// eCos memory layout - Fri Oct 20 05:56:24 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x04000000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x04000000 - (size_t) CYG_LABEL_NAME (__heap1))
+
Index: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.ldi
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.ldi
diff -N packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.ldi
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_ram.ldi	29 Sep 2003 14:49:41 -0000	1.1
@@ -0,0 +1,27 @@
+// eCos memory layout - Fri Oct 20 05:56:24 2000
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x02000000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
+    SECTION_rom_vectors (ram, 0x20000, LMA_EQ_VMA)
+    SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
Index: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.h
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.h
diff -N packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.h	29 Sep 2003 15:27:13 -0000	1.2
@@ -0,0 +1,20 @@
+// eCos memory layout - Tue Jul 02 10:03:04 2002
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x04000000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x50000000)
+#define CYGMEM_REGION_rom_SIZE (0x40000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x04000000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.ldi
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.ldi
diff -N packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.ldi
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/include/pkgconf/mlt_arm_xscale_coyote_rom.ldi	29 Sep 2003 14:49:41 -0000	1.1
@@ -0,0 +1,29 @@
+// eCos memory layout - Tue Jul 02 10:03:04 2002
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x02000000
+    rom : ORIGIN = 0x50000000, LENGTH = 0x40000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (rom, 0x50000000, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_mmu_tables (rom, ALIGN (0x4000), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
+    SECTION_data (ram, 0x8000, FOLLOWING (.mmu_tables))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
Index: packages/hal/arm/xscale/coyote/current/misc/redboot_RAM.ecm
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/misc/redboot_RAM.ecm
diff -N packages/hal/arm/xscale/coyote/current/misc/redboot_RAM.ecm
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/misc/redboot_RAM.ecm	4 Dec 2003 10:10:14 -0000	1.4
@@ -0,0 +1,127 @@
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+    description "" ;
+    hardware    coyote ;
+    template    redboot ;
+    package -hardware CYGPKG_HAL_ARM current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_CORE current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_IXP425 current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_COYOTE current ;
+    package -hardware CYGPKG_IO_PCI current ;
+    package -hardware CYGPKG_DEVS_ETH_INTEL_NPE current ;
+    package -hardware CYGPKG_DEVS_ETH_ARM_GRG_NPE current ;
+    package -hardware CYGPKG_DEVS_FLASH_STRATA current ;
+    package -hardware CYGPKG_DEVS_FLASH_GRG current ;
+    package -template CYGPKG_HAL current ;
+    package -template CYGPKG_INFRA current ;
+    package -template CYGPKG_REDBOOT current ;
+    package -template CYGPKG_ISOINFRA current ;
+    package -template CYGPKG_LIBC_STRING current ;
+    package -template CYGPKG_CRC current ;
+    package CYGPKG_IO_FLASH current ;
+    package CYGPKG_IO_ETH_DRIVERS current ;
+    package CYGPKG_MEMALLOC current ;
+    package CYGPKG_COMPRESS_ZLIB current ;
+};
+
+cdl_component CYG_HAL_STARTUP {
+    user_value RAM
+};
+
+cdl_option CYGBLD_BUILD_GDB_STUBS {
+    user_value 0
+};
+
+cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS {
+    inferred_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+    user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+    user_value 0
+};
+
+cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
+    inferred_value 0
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
+    inferred_value 1
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
+    inferred_value 0
+};
+
+cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+    inferred_value 0 0
+};
+
+cdl_option CYGPKG_HAL_GDB_FILEIO {
+    user_value 1
+};
+
+cdl_option CYGHWR_HAL_IXP425_PCI_NP_WORKAROUND {
+    inferred_value 1
+};
+
+cdl_component CYGBLD_BUILD_REDBOOT {
+    user_value 1
+};
+
+cdl_option CYGBLD_BUILD_REDBOOT_WITH_IOMEM {
+    user_value 1
+};
+
+cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE {
+    inferred_value 0x40000
+};
+
+cdl_component CYGSEM_REDBOOT_FLASH_CONFIG {
+    user_value 1
+};
+
+cdl_component CYGSEM_REDBOOT_BSP_SYSCALLS {
+    inferred_value 1
+};
+
+cdl_option CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT {
+    inferred_value 0x600000
+};
+
+cdl_option CYGBLD_ISO_STRTOK_R_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/bsdstring.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGSEM_IO_FLASH_DRIVER_API {
+    inferred_value 2
+};
+
+
Index: packages/hal/arm/xscale/coyote/current/misc/redboot_ROM.ecm
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/misc/redboot_ROM.ecm
diff -N packages/hal/arm/xscale/coyote/current/misc/redboot_ROM.ecm
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/misc/redboot_ROM.ecm	4 Dec 2003 10:10:14 -0000	1.4
@@ -0,0 +1,135 @@
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+    description "" ;
+    hardware    coyote ;
+    template    redboot ;
+    package -hardware CYGPKG_HAL_ARM current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_CORE current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_IXP425 current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_COYOTE current ;
+    package -hardware CYGPKG_IO_PCI current ;
+    package -hardware CYGPKG_DEVS_ETH_INTEL_NPE current ;
+    package -hardware CYGPKG_DEVS_ETH_ARM_GRG_NPE current ;
+    package -hardware CYGPKG_DEVS_FLASH_STRATA current ;
+    package -hardware CYGPKG_DEVS_FLASH_GRG current ;
+    package -template CYGPKG_HAL current ;
+    package -template CYGPKG_INFRA current ;
+    package -template CYGPKG_REDBOOT current ;
+    package -template CYGPKG_ISOINFRA current ;
+    package -template CYGPKG_LIBC_STRING current ;
+    package -template CYGPKG_CRC current ;
+    package CYGPKG_IO_FLASH current ;
+    package CYGPKG_IO_ETH_DRIVERS current ;
+    package CYGPKG_MEMALLOC current ;
+    package CYGPKG_COMPRESS_ZLIB current ;
+};
+
+cdl_component CYG_HAL_STARTUP {
+    user_value ROM
+};
+
+cdl_option CYGBLD_BUILD_GDB_STUBS {
+    user_value 0
+};
+
+cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS {
+    inferred_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+    user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+    user_value 0
+};
+
+cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
+    inferred_value 0
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
+    inferred_value 1
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
+    inferred_value 0
+};
+
+cdl_option CYGSEM_HAL_ROM_MONITOR {
+    user_value 1
+};
+
+cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+    inferred_value 0 0
+};
+
+cdl_option CYGPKG_HAL_GDB_FILEIO {
+    user_value 1
+};
+
+cdl_option CYGHWR_HAL_IXP425_PCI_NP_WORKAROUND {
+    inferred_value 1
+};
+
+cdl_component CYGBLD_BUILD_REDBOOT {
+    user_value 1
+};
+
+cdl_option CYGBLD_BUILD_REDBOOT_WITH_IOMEM {
+    user_value 1
+};
+
+cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE {
+    inferred_value 0x40000
+};
+
+cdl_component CYGSEM_REDBOOT_FLASH_CONFIG {
+    user_value 1
+};
+
+cdl_component CYGSEM_REDBOOT_BSP_SYSCALLS {
+    inferred_value 1
+};
+
+cdl_option CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT {
+    inferred_value 0x600000
+};
+
+cdl_option CYGBLD_ISO_STRTOK_R_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/bsdstring.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_DNS_HEADER {
+    inferred_value 1 <cyg/ns/dns/dns.h>
+};
+
+cdl_option CYGSEM_IO_FLASH_DRIVER_API {
+    inferred_value 2
+};
+
+
Index: packages/hal/arm/xscale/coyote/current/src/coyote_misc.c
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/src/coyote_misc.c
diff -N packages/hal/arm/xscale/coyote/current/src/coyote_misc.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/src/coyote_misc.c	29 Sep 2003 15:17:06 -0000	1.2
@@ -0,0 +1,132 @@
+//==========================================================================
+//
+//      coyote_misc.c
+//
+//      HAL misc board support code for the ADI Coyote
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-02-05
+// Purpose:      HAL board support
+// Description:  Implementations of HAL board interfaces
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================*/
+
+#include <pkgconf/hal.h>
+#include <pkgconf/system.h>
+#include CYGBLD_HAL_PLATFORM_H
+
+#include <cyg/infra/cyg_type.h>     // base types
+#include <cyg/infra/cyg_trac.h>     // tracing macros
+#include <cyg/infra/cyg_ass.h>      // assertion macros
+
+#include <cyg/hal/hal_io.h>         // IO macros
+#include <cyg/hal/hal_arch.h>       // Register state info
+#include <cyg/hal/hal_diag.h>
+#include <cyg/hal/hal_intr.h>       // Interrupt names
+#include <cyg/hal/hal_cache.h>
+#include <cyg/hal/hal_ixp425.h>     // Hardware definitions
+#include <cyg/hal/coyote.h>            // Platform specifics
+
+#include <cyg/infra/diag.h>             // diag_printf
+
+//
+// Platform specific initialization
+//
+
+void
+plf_hardware_init(void)
+{
+    // POWER_FAIL IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_PWR_FAIL_IRQ_N);   
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_PWR_FAIL, 1, 0);
+
+    // DSL IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_DSL_IRQ_N);
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_DSL, 1, 0);
+
+    // SLIC_A IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_SLIC_A_IRQ_N);
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_SLIC_A, 1, 0);
+
+    // SLIC_B IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_SLIC_B_IRQ_N);
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_SLIC_B, 1, 0);
+
+    // DSP IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_DSP_IRQ_N);
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_DSP, 1, 0);
+
+    // IDE IRQ
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_IDE_IRQ_N);
+    HAL_INTERRUPT_CONFIGURE(CYGNUM_HAL_INTERRUPT_IDE, 1, 0);
+
+    // IO RESET_N  (DSP/SLICs)
+    HAL_GPIO_OUTPUT_SET(GPIO_IO_RESET_N);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_IO_RESET_N);
+    
+    // SPI_CS1_N
+    HAL_GPIO_OUTPUT_SET(GPIO_SPI_CS1_N);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_SPI_CS1_N);   // Eth PHY
+
+    // SPI_CS0_N
+    HAL_GPIO_OUTPUT_SET(GPIO_SPI_CS0_N);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_SPI_CS0_N);   // SLICs
+
+    // SPI_SCK
+    HAL_GPIO_OUTPUT_CLEAR(GPIO_SPI_SCK);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_SPI_SCK);
+
+    // SPI_SDI
+    HAL_GPIO_OUTPUT_CLEAR(GPIO_SPI_SDI);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_SPI_SDI);
+
+    // SPI_SDI
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_SPI_SDI);
+
+#ifdef CYGPKG_IO_PCI
+    extern void hal_plf_pci_init(void);
+    hal_plf_pci_init();
+#endif
+}
+
+// ------------------------------------------------------------------------
+// EOF coyote_misc.c
Index: packages/hal/arm/xscale/coyote/current/src/coyote_pci.c
===================================================================
RCS file: packages/hal/arm/xscale/coyote/current/src/coyote_pci.c
diff -N packages/hal/arm/xscale/coyote/current/src/coyote_pci.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/coyote/current/src/coyote_pci.c	29 Sep 2003 15:17:06 -0000	1.2
@@ -0,0 +1,133 @@
+//==========================================================================
+//
+//      coyote_pci.c
+//
+//      HAL PCI board support code for the ADI Coyote
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-02-05
+// Purpose:      HAL PCI board support
+// Description:  Implementations of HAL board interfaces
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================*/
+#include <pkgconf/hal.h>
+#include <pkgconf/system.h>
+#include CYGBLD_HAL_PLATFORM_H
+
+#ifdef CYGPKG_IO_PCI
+
+#include <cyg/infra/cyg_type.h>         // base types
+#include <cyg/infra/cyg_trac.h>         // tracing macros
+#include <cyg/infra/cyg_ass.h>          // assertion macros
+
+#include <cyg/hal/hal_io.h>             // IO macros
+#include <cyg/hal/hal_if.h>             // calling interface API
+#include <cyg/hal/hal_arch.h>           // Register state info
+#include <cyg/hal/hal_diag.h>
+#include <cyg/hal/hal_intr.h>           // Interrupt names
+#include <cyg/hal/hal_cache.h>
+#include <cyg/io/pci_hw.h>
+#include <cyg/io/pci.h>
+
+
+#define IXP425_PCI_MAX_DEV      4
+#define IXP425_PCI_IRQ_LINES    4
+
+// PCI pin mappings
+#define PCI_CLK_GPIO     14  // CLK0
+#define PCI_RESET_GPIO   12
+#define PCI_INTA_GPIO    11
+
+#define INTA    CYGNUM_HAL_INTERRUPT_GPIO11
+
+void
+cyg_hal_plf_pci_translate_interrupt(cyg_uint32 bus, cyg_uint32 devfn,
+				    CYG_ADDRWORD *vec, cyg_bool *valid)
+{
+    *vec = INTA;
+    *valid = true;
+}
+
+
+#define HAL_PCI_CLOCK_ENABLE() \
+    *IXP425_GPCLKR |= GPCLKR_CLK0_ENABLE;  // GPIO(0) used for PCI clock
+
+#define HAL_PCI_CLOCK_DISABLE() \
+    *IXP425_GPCLKR &= ~GPCLKR_CLK0_ENABLE;  // GPIO(0) used for PCI clock
+
+#define HAL_PCI_CLOCK_CONFIG() \
+    *IXP425_GPCLKR |= GPCLKR_CLK0_PCLK2;
+
+#define HAL_PCI_RESET_ASSERT() \
+    HAL_GPIO_OUTPUT_CLEAR(PCI_RESET_GPIO);
+
+#define HAL_PCI_RESET_DEASSERT() \
+    HAL_GPIO_OUTPUT_SET(PCI_RESET_GPIO);
+
+void
+hal_plf_pci_init(void)
+{
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
+    HAL_PCI_RESET_ASSERT();
+    HAL_PCI_CLOCK_DISABLE();
+
+    // Set GPIO line direction
+    HAL_GPIO_OUTPUT_ENABLE(PCI_CLK_GPIO);
+    HAL_GPIO_OUTPUT_ENABLE(PCI_RESET_GPIO);
+    HAL_GPIO_OUTPUT_DISABLE(PCI_INTA_GPIO);
+
+    // configure PCI interrupt lines for active low irq
+    HAL_INTERRUPT_CONFIGURE(INTA, 1, 0);
+
+    // wait 1ms to satisfy "minimum reset assertion time" of the PCI spec.
+    HAL_DELAY_US(1000);
+    HAL_PCI_CLOCK_CONFIG();
+    HAL_PCI_CLOCK_ENABLE();
+
+    // wait 100us to satisfy "minimum reset assertion time from clock stable" 
+    // requirement of the PCI spec.
+    HAL_DELAY_US(100);
+    HAL_PCI_RESET_DEASSERT();
+#endif
+}
+
+#endif // CYGPKG_IO_PCI

-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]