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Re: ISR problem
- From: ram kumar <ram_ecos at yahoo dot co dot in>
- To: Bart Veer <bartv at ecoscentric dot com>
- Cc: ecos-discuss at ecos dot sourceware dot org
- Date: Tue, 3 Jan 2006 11:57:16 +0000 (GMT)
- Subject: Re: [ECOS] ISR problem
Thanks Bart Veer.
My DSR is working well for COM2, but in case of COM1
its not working correctly. On initialization of COM1 I
am getting a message.
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
hal_arch_default_isr: 33 (data:0)
hal_arch_default_isr: 43 (data:0)
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
And then every thing stops.But my ISR is using vector
35. Please give suggestions.
Thanks & regards,
Ram Kumar
--- Bart Veer <bartv@ecoscentric.com> wrote:
> >>>>> "Ram" == ram kumar <ram_ecos@yahoo.co.in>
> writes:
>
> Ram> I checked the serial driver 'ser0'. That is
> working well. I
> Ram> used cyg_io_read & write for testing.
>
> Ram> I found that ISR & DSR of 'ser0' are taken
> from 'generic
> Ram> 16x5x' for x86 PC. But I want my own
> implementation in DSR. I
> Ram> am having a global buffer in which I have
> to save the
> Ram> received data. I am giving the
> implementation code of my own
> Ram> ISR & DSR. Please suggest me, what I did
> wrong in my code.
>
> <snip>
>
> Ram> // I tried with vector = 12 & 32 &
> 38
>
> I am not sure where you got those numbers from.
>
> The interrupt vector numbers for any target are
> defined, directly or
> indirectly, in the header <cyg/hal/hal_intr.h>. On a
> PC target that
> chains to var_intr.h -> plf_intr.h -> pcmb_intr.h,
> which contains the
> following:
>
> #define CYGNUM_HAL_INTERRUPT_COM2 35
> #define CYGNUM_HAL_INTERRUPT_COM1 36
>
> Bart
>
> --
> Bart Veer eCos Configuration
> Architect
> http://www.ecoscentric.com/ The eCos and RedBoot
> experts
>
>
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