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Re: J3 flash lockbits across reset
On Thu, Jan 12, 2006 at 04:36:52AM -0500, alfred hitch wrote:
> 3) Going to RAM is anyways needed.
> My ques. was does one needs to ensure that there are no process which
> issue a read / write to flash in parallel at the time 1st lock command
> was issued.
That is why i said disable interrupts. Apart from a NMI nothing else
can happen.
Andrew
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