[ECOS] problem with go in IXP 425

[sumanth <sumanth dot kondlada at wipro dot com>]

Hi all,
 
       I am porting ecos for ixp 425 evaluation board, i am using axd
debugger to debug the code. i have build the ram image
of grg. i am using j-tag interface through multi-ice, when i single step
through the code what ever the modifications i make to the registers they
are taking into effect but when i say a go to certian point the changes that
i am making are not getting reflected, but it is pasing control to that
point
  
for example
 
// clear BSS
        ldr     r1,.__bss_start
        ldr     r2,.__bss_end
        mov     r0,#0
        cmp     r1,r2
        beq     2f
1:     str     r0,[r1],#4
        cmp     r1,r2
        bls     1b
                                     that code clears the bss area in ram,
but in my case  it clears untill when i single step but when i say a go to
next instruction it is giving control to the next point but i does'nt clear
the area by keeping zero's
i thought this problem may be with clock speed of cpu so i reduced that to
266 MHz from 533 MHz, but no change in the behaviour
 
** I am connecting to processor in supervisor mode (DCSR is set to halt
mode)
     j-tag clock speed as 20 kHz
     cpu speed at 266 mHz
     expansion bus peed at 133 mHz
 
can anyone please help me inthis regard,
1) is cpu speed causing problem
2) is sd-ram read write causing problem
3) is j-tag clock unable to synchronize with cpu
4) are we missing any thing to initilize cpu at this stage
5) is problem with expansion bus speed
 
any pointers are welcome
 
 
Thanks & regards,
Sumanth.


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