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ref to previous question-'calling path questions, thanks'


Hi eCOS experts:

Maybe my previous question (http://ecos.sourceware.org/ml/ecos-discuss/2006-09/msg00231.html) is a little confusing, what it really means is the followings:

(ARM target)
Two thread #1 and #2 exist in system

(1) Thread #1 runs first
(2) Thread #1 issues SWI instruction
(3) Enter SWI ISR and run on thread #1 stack (svc mode)
(4) At the time IRQ occurs and preempts SWI ISR
(5) Switch SVC and run on thread #1 stack (svc mode)
(6) Eventually comes to interrupt_end() and unlock_inner(), which will cause a context switching
(7) Thread #2 context is loadded and return with thread #2 running


Here seems SWI is preempted by thread #2? Is this correct?
(shouldn't all ISR be finished before any thread has the chance to run?)


Hope someone can give me some hint, that would be very thankful.


Thanks in advance.

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