Hi,
Regarding your questions about the code it seems to be download
correctly since hexdump from bin file is the same as
powerpc-eabi-objdump from elf except for the 0x40000 offset present in
elf file (no problem since this bin should be generated just for ROM).
Regarding the tools, they are used to download other images/projects
(u-boot) and program FLASH.
For this project I would like to test and use redboot and that is the
reason why I am boring you an all people with this.
Right now I'm using gdb 5.0 with mpcbdm 1.2.2 (Unfortunately I don't
have a BDI2000 ;-(.) to load redboot.elf to SDRAM.
$ powerpc-linux-gdb -x board.gdbinit redboot.elf
(gdb) load
Loading section .vectors, size 0x2000 lma 0x40000
Loading section .text, size 0x1c568 lma 0x42000
Loading section .rodata, size 0x59b4 lma 0x5e568
Loading section .data, size 0x11a0 lma 0x63f20
Start address 0x40100 , load size 151740
Transfer rate: 134880 bits/sec, 510 bytes/write.
To run it I a make
(gdb) j *0x40100
but as I said before I always got a SIGINT interrupt
Program received signal SIGINT, Interrupt.
CR := (CR0|4CR1|8CR2|12CR3|16CR4|20CR5|24CR6|28CR7)
SPR 2:Condition Register, UM140
CR = 0x2002608d =
(CR0=0x2|CR1=0x0|CR2=0x0|CR3=0x2|CR4=0x6|CR5=0x0|CR6=0x8|CR7=0xd)
ICR := (|RST|CHSTP|MCI||6EXTI|ALI|PRI|FPUVI|DECI||13SYSI|TR||17SEI|ITLBMS|DTBLMS|ITLBER|DTLBER||28LBRK|IBRK|EBRK|DPI)
SPR 148:Interrupt Cause Register, UM994
ICR = 0x00004000 = (SEI)
0x4b6c0 in ?? ()
(gdb)
looking at objdump and .S files is in the right moment when I tried to
program BR0/CS0
------------------------------ objdump file
4b6b4: 90 64 01 70 stw r3,368(r4)
4b6b8: 90 64 01 74 stw r3,372(r4)
4b6bc: 3c 60 40 00 lis r3,16384
4b6c0: 60 63 08 01 ori r3,r3,2049
4b6c4: 3c a0 ff 80 lis r5,-128
4b6c8: 60 a5 07 74 ori r5,r5,1908
4b6cc: 90 64 01 00 stw r3,256(r4)
4b6d0: 90 a4 01 04 stw r5,260(r4)
4b6d4: 3c 60 00 00 lis r3,0
-------------------------------
------------------------------- .S file
lwi r3,0x00802114|(MAMR_PTA<<24)
stw r3,MAMR(r4)
stw r3,MBMR(r4)
/*
* Base Register initialization.
*/
/* BOOT ROM */
lwi r3,0x40000801 # 16-bit, GPCM
lwi r5,0xFF800774 # 7 wait states, up to 8MB
stw r3,BR0(r4)
stw r5,OR0(r4)
/* ONBOARD SDRAM */
lwi r3,0x00000081 # 32-bit, UPMA
lwi r5,0xFF800E00
stw r3,BR1(r4)
stw r5,OR1(r4)
-------------------------------
Why does it happen? Do you have an idea?
Thx again,
TT.
On 6/20/07, Tales Toledo <toledo.tales@gmail.com> wrote:
> Hi,
>
> I see some progress now.
> I was downloading .bin file to 0x0 (the same procedure I was using
> before when I tried to download code to RAM an programming to flash).
> I decide to move from .bin to .elf and voilá...
>
> Now I have a new message
>
> --------------------------------------------------------------
> Program received signal SIGINT, Interrupt.
> CR := (CR0|4CR1|8CR2|12CR3|16CR4|20CR5|24CR6|28CR7)
> SPR 2:Condition Register, UM140
> CR = 0x2042488d =
> (CR0=0x2|CR1=0x0|CR2=0x4|CR3=0x2|CR4=0x4|CR5=0x8|CR6=0x8|CR7=0xd)
> ICR := (|RST|CHSTP|MCI||6EXTI|ALI|PRI|FPUVI|DECI||13SYSI|TR||17SEI|ITLBMS|DTBLMS|ITLBER|DTLBER||28LBRK|IBRK|EBRK|DPI)
> SPR 148:Interrupt Cause Register, UM994
> ICR = 0x00004000 = (SEI)
> 0x4b6c0 in hal_hardware_init ()
> ---------------------------------------------------------------
>
> looking at disassembled file
>
> ---------------------------------------------------------------
> 4b6b8: 90 64 01 74 stw r3,372(r4)
> 4b6bc: 3c 60 40 00 lis r3,16384
> 4b6c0: 60 63 08 01 ori r3,r3,2049
> 4b6c4: 3c a0 ff 80 lis r5,-128
> 4b6c8: 60 a5 07 74 ori r5,r5,1908
> 4b6cc: 90 64 01 00 stw r3,256(r4)
> 4b6d0: 90 a4 01 04 stw r5,260(r4)
> 4b6d4: 3c 60 00 00 lis r3,0
> 4b6d8: 60 63 00 81 ori r3,r3,129
> 4b6dc: 3c a0 ff 80 lis r5,-128
> 4b6e0: 60 a5 0e 00 ori r5,r5,3584
> 4b6e4: 90 64 01 08 stw r3,264(r4)
> 4b6e8: 90 a4 01 0c stw r5,268(r4)
> ---------------------------------------------------------------
>
> seems that the exception occurs when I'm programming BR0/OR0
>
> -------------------------------------------
> /*
> * Base Register initialization.
> */
>
> /* BOOT ROM */
> lwi r3,0x40000801 # 16-bit, GPCM
> lwi r5,0xFF800774 # 7 wait states, up to 8MB
> stw r3,BR0(r4)
> stw r5,OR0(r4)
>
> /* ONBOARD SDRAM */
> lwi r3,0x00000081 # 32-bit, UPMA
> lwi r5,0xFF800E00
> stw r3,BR1(r4)
> stw r5,OR1(r4)
> -----------------------------------------------
>
> I didn't see the problem yet. Any idea.
>
> Thanks,
> TT.
>
>
> On 6/20/07, Gary Thomas <gary@mlbassoc.com> wrote:
> > -----BEGIN PGP SIGNED MESSAGE-----
> > Hash: SHA1
> >
> > Tales Toledo wrote:
> > > Hi,
> > >
> > > I'm facing some problems trying to port redboot to MPC885...
> > > I have tried to follow the steps suggested at porting guide. I'm using only
> > > RAM as a first step but unfortunately I can get success. I'm using
> > > Viper files as reference.
> > >
> > > I'm using gdb with mpcbdm and get always the same exception when
> > > running it from RAM.
> >
> > Look carefully - this is failing on the first instruction you downloaded,
> > so it most certainly has nothing to do with porting eCos.
> > * Have you verified the code that was downloaded correctly?
> > * Have you successfully executed any code on this platform using these tools?
> >
> > - --
> > - ------------------------------------------------------------
> > Gary Thomas | Consulting for the
> > MLB Associates | Embedded world
> > - ------------------------------------------------------------
> > -----BEGIN PGP SIGNATURE-----
> > Version: GnuPG v1.4.7 (GNU/Linux)
> > Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org
> >
> > iD8DBQFGeY4YmaKbSsQGV8ARAirMAJ9xEKtFrDXYOh5jB59disiPExgbUgCgjT0j
> > xmJBNpW1xfQruVljpMs/JrY=
> > =/UuG
> > -----END PGP SIGNATURE-----
> >
>