This is the mail archive of the ecos-discuss@sourceware.org mailing list for the eCos project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Re: eCos invalidating JTAG on ARM architecture ?

Ok I implemented that and it enabled me to know what in vectors.S was
disabling JTAG. Ironically, i shortened it to the "bl cyg_start"
instruction at the end of the "start:" label (last instruction for
this label i think).

I find it weird because it would mean the launch of the actual kernel
software is what makes it impossible for me to debug further.

Do you know where i can find that "cyg_start" label vectors.S is
referring to and is it worth it lurking that way ?

I can totally watch my board run before that instruction, and lose the
JTAG connection after that, openOCD telling me that my CPSR contains
invalid data.

--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]