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RE: Can't Connect,TCP CHECKSUM INCORRECT


Ariga,
Can you send your generated ecc file?

-Alok

-----Original Message-----
From: ariga masahiro [mailto:ariga@link-lab.co.jp] 
Sent: Thursday, November 08, 2007 7:26 AM
To: Gary Thomas; Alok Singh; Andrew Lunn
Cc: ecos-discuss@ecos.sourceware.org
Subject: Re: [ECOS] Can't Connect,TCP CHECKSUM INCORRECT

Hello,

Alok,thank you very much for your reply.

Alok wrote
> It will better if you remove all your little/big endian hacks. Or Take
a
> fresh view. And take care of the following -

I checked two parameters you suggest,but I was encountered next
questions 
for each.
Please allow my ignorance and teach me how to settle it.

About,
> 1) CYGPKG_HAL_MIPS_MSBFIRST  - should be defined, (and not
> CYGPKG_HAL_MIPS_LSBFIRST)
My target uses SH7709S.
CYGPKG_HAL_MIPS_MSBFIRST is included next cdl files,
packages\hal\mips\idt32334\current\cdl\hal_mips_idt32334.cdl(68): 
cdl_option CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\mips32\current\cdl\hal_mips_mips32.cdl(96):
cdl_option 
CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\rm7000\var\current\cdl\hal_mips_rm7000.cdl(118): 
cdl_option CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\tx39\current\cdl\hal_mips_tx39.cdl(78):
cdl_option 
CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\tx49\current\cdl\hal_mips_tx49.cdl(119): 
cdl_option CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\upd985xx\current\cdl\hal_mips_upd985xx.cdl(201): 
cdl_option CYGPKG_HAL_MIPS_MSBFIRST {
packages\hal\mips\vrc4373\current\cdl\hal_mips_vr4300_vrc4373.cdl(82): 
cdl_option CYGPKG_HAL_MIPS_MSBFIRST {
but my target never uses above cdl file.
My target's configuration is like next in ecos.db.
target inserter {
        alias       { "Hitachi inserter board" }
        packages    { CYGPKG_HAL_SH
                      CYGPKG_HAL_SH_SH3
                      CYGPKG_HAL_SH_SH77X9_inserter
                      CYGPKG_IO_FLASH
                      CYGPKG_DEVS_FLASH_SH_inserter
                      CYGPKG_DEVS_FLASH_AMD_AM29XXXXX
                      CYGPKG_DEVS_ETH_SMSC_LAN91CXX
                      CYGPKG_DEVS_ETH_SH_INSERTER
                      CYGPKG_IO_ETH_DRIVERS
                      CYGPKG_IO_SERIAL_SH_inserter
                      CYGPKG_IO_SERIAL_SH_SCIF
        }
        description "
           The inserter target provides the packages needed to run
           eCos on a Hitachi Solution Engine 77x9 board."
}
Please tell me where and how to include CYGPKG_HAL_MIPS_MSBFIRST.
I send my ecos.db for reference.

About,
> 2) # define CYG_BYTEORDER as CYG_MSBFIRST (and not as CYG_LSBFIRST).
It
> should be decided based on option 1) actually.
CYG_BYTEORDER is defined as below in 
packages\hal\sh\arch\current\include\basetype.h(60)
#ifdef __LITTLE_ENDIAN__
# define CYG_BYTEORDER          CYG_LSBFIRST // Little endian
#else
# define CYG_BYTEORDER          CYG_MSBFIRST // Big endian
#endif

__LITTLE_ENDIAN__ are defined in next files.
packages\hal\common\current\include\hal_stub.h(100):
#if (CYG_BYTEORDER==CYG_LSBFIRST)
# if !defined(__LITTLE_ENDIAN__)
#  define __LITTLE_ENDIAN__
# endif
# if !defined(_LITTLE_ENDIAN)
#  define _LITTLE_ENDIAN
# endif
#endif

packages\redboot\current\include\net\net.h(86):
#if (CYG_BYTEORDER == CYG_LSBFIRST)
#ifndef __LITTLE_ENDIAN__
#define __LITTLE_ENDIAN__
#endif
extern unsigned long  ntohl(unsigned long x);
extern unsigned short ntohs(unsigned short x);
#else
#define ntohl(x) (x)
#define ntohs(x) (x)
#endif

I think redboot program space is differnt so I could exclude it.
The question is, between basetype.h and hal_stub.h which is included
first ?
I never defined __LITTLE_ENDIAN__, so I thought even right now,
# define CYG_BYTEORDER          CYG_MSBFIRST // Big endian
Isn't it?

I look forward your reply.
Thanks in advance.

Masahiro Ariga


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