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Re: Confusion about MIPS reset vector


Hi Patrick.

On Tue, 2007-11-27 at 11:49 -0500, Domegan, Patrick wrote:
> We are trying to create a port of eCOS to our board (MIPS 4Kec) based
> from the Malta branch.

> I am making the following assumptions/observations (possibly faulty):
> -MIPS reset vector is at 0xBFC00000 

That is correct. The address lies in KSEG1 which is uncached and is the
only chunk of the MIPS memory map that is guaranteed to behave properly
at system reset time. Its physical address 0x1FC00000 btw.

> -Even the eCOS file \packages\hal\mips\arch\current\src\vectors.S makes
> a note of this in a comment(Line 78: # Reset vector at 0xBFC00000)

Agreed. Which is fine considering that is the code that will begin
executing directly after reset.

> -The loader script file mlt_mips_malta_ram.ldi puts the address of the
> final image starting at 0x80020000

Correct. Since this is a linker script for an eCos RAM Image and not a
ROM Image. The assumption is that someone will load the image at the
appropriate address and jump to it.

> -a dump of the resulting elf file indicates that the images will start
> loading at 0x80020000 (as expected) and the start address is 0x800200bc

Which is fine.

> My question: shouldn't the start address be 0xBFC00000?? If the starting
> address is 0x800200bc then is there some Malta specific hardware that
> changes it from the default 0xBFC00000??  The problem is my ignorance so
> any pointers would be appreciated.

No special hardware. Its just an eCos RAM Image. Grok the docs.

Cheerio!
Robin


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