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"Domegan, Patrick" <Patrick.Domegan@amd.com> writes:
Andrew,
Sorry I mean MIPS core, specifically MIPS 4KEc
In the case of MIPS you will have to deal with the kseg0/1 segment size limits. From memory these are limited to 512MB. So if you have more RAM, you would have to set up the MMU to map the excess into useg. eCos generally doesn't use the MMU in MIPS targets, so there is little example code, but you should be able to map everything using one or two TLB entries.
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