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Re: Can excessive/intensive serial flow cause stack overflow?

On Thu, Jul 3, 2008 at 4:58 PM, Alexandre <thekyz@gmail.com> wrote:
> TRACE: intr.cxx            [  86] Cyg_Interrupt::Cyg_Interrupt()
>                                                         ((vector=7,
> priority=4, data=40000860, isr=000049ec, dsr=00004a3c))

Let's try to advance by myself :)

CYGNUM_HAL_INTERRUPT_UART1 is interrupt 7 so there must be an error around this.
Can't both UARTs use the same priority level & if not, how can I change that ?

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