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RE: how to handle missed interrupt issue?
- From: "Paul D. DeRocco" <pderocco at ix dot netcom dot com>
- To: "eCos Discuss" <ecos-discuss at ecos dot sourceware dot org>
- Date: Fri, 6 Feb 2009 10:36:14 -0800
- Subject: RE: [ECOS] how to handle missed interrupt issue?
> From: Dave Milter [mailto:davemilter@gmail.com]
>
> you think that settting flag on arm9 is atomic thing?
>
> I look at code atomic in linux kernel, in case of arm9 (armv5 core) it
> disable interrupts set flag and then enable interrupts.
Unconditionally setting a byte flag is certainly atomic, on any CPU.
Incrementing a flag isn't, nor is testing it and setting, which means that
these things can only be done by something that isn't interruptible.
If the application stores 1 in a byte, the interrupt handler can safely test
and set it back to 0 it at the beginning. This should work even in an SMP
environment, because only one CPU will run the interrupt handler at a time.
Whether this solves the original problem, I have no idea.
--
Ciao, Paul D. DeRocco
Paul mailto:pderocco@ix.netcom.com
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