#ifndef SUN_H_
#define SUN_H_
/*==============================================================================
System  :       INTRA S/W                                   Copyright 2008..
                ================================================================
                BRUSAG, Sensorik & messtechn.               ph: +41 44 926 74 74
                Entwicklungen,                              fx: +41 44 926 73 34
                Chapfwiesenstr. 14                          em: rbrusa@brusag.ch
                CH-8712 Staefa (Switzerland)                http://www.brusag.ch
================================================================================
SWSystem:	eCOS and toolchain arm-elf-gcc (GCC) 3.2.1 (eCosCentric)
Target:		INTRA Controller with AT91SAM7X-256
Abstract:	Sunsensor and low level handling of ADC of the AT91SAM7X.
	channel assignments are:
	0:	UPWR	VDC	DC power (24 VDCnom) from a voltage divider
	1:	UTEMP	°C	KTY13-6-based temperature sensor of board temperature
	2:	UCUR0	mA	current from base-shunt of motor0-driver	
	3:	UCUR1	mA	current from base-shunt of motor1-driver
	4:	q0		V	Signal from sun-sensor quadrant 0
	5:	q1		V	Signal from sun-sensor quadrant 1	
	4:	q2		V	Signal from sun-sensor quadrant 2
	7:	q3		V	Signal from sun-sensor quadrant 3
	
	This ADC-handler uses timer-counter 2 to trigger periodic sampling of all its 8
	channels. Data are stored in ram by dma-transfer. The interrupt routine and the
	associeted DSR implement higher level funktionality.

	Except for ch2 and 3, all all signals are slowly varying. ch2 and 3,
	are filtered with a 10k/100n=1 ms-RC-filter. Let's go for a 1 kHz sampling
	of all channels. We then take mean values sampled during 20 ms (50 Hz lines)
	At places with a 60 Hz line frequncy, the sampling is set for 5/6 ms.
	Irrespective of the lf, a full period consists of 20 readings.. We use TC2
	to produce periodic trigger events for the ADCs DMA.
	
	The ADC is read in an interrupt driven loop. We calculate means of all 8
	channels and these 8 readings are available by suitable function/routine
	calls.
--------------------------------------------------------------------------------
Edit history:
20-Oct-08 RWB:	Creation
*/
#include <cyg/infra/cyg_type.h>		// basic types for AT91-hardware
#include <cyg/hal/hal_io.h>			// registers and fields of AT91-hardware
//#include "ihw.h"

//#define AT91_PMC_PCER_ADC (1 << 17)	// still missing in cyg/hal/var_io.h

#define SUN_TST 0	// use bit-wize. 0 suppresses all tests

#if SUN_TST & 1
	extern void Show( void );
#endif

extern cyg_uint32 GetADC( cyg_uint32 ch);
// returns last available mean of ADC-readings from channel ch = [0..7]
// ch == 8 returns adcdata.svdcnt, ch > 8 return sample-counter

extern float GetVolt(cyg_uint32 ch);
// returns mean of adc-reading converted to volts. ch must be in the range 0..7

extern float GetSig(cyg_uint32 ch);
// return physical parameter attached to ch=[0..7] in suitable units. The
// evaluation uses the currently available mean value of the cor. channel.
// Units - see above

extern void GetSun(float *q);
// returns voltages of the 4 quadrants as computed from last available means.

extern bool Read4Angle(double *p, double *s, double *qm);
/* deviations of primary and secondary axis in app. encoder-counts
 * returns true if enough sun - qm is the mean of the 4 quadrants
 */

extern void IniSun(  cyg_uint32 linefreq );	// 50 or 60 allowed
//initializes TC2 and ADC for 1ms sampling on all 8 channels


#endif /*SUN_H_*/