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eCos booting w/ interrupts disabled

From: Nathan French <nathan dot french at onrampwireless dot com>
To: ecos-discuss at ecos dot sourceware dot org
Date: Wed, 16 Sep 2009 13:25:12 -0700
Subject: [ECOS] eCos booting w/ interrupts disabled

I'm doing a variant port for some new piece of hardware we're building.
I have copied the AT91 which our previous hardware was based on and am
porting to a custom chip with an ARM7 and custom interrupt controller
(and other peripherals).

My current problem is that the IRQ/FIQ disable bits in the ARM7 CPSR are
never cleared.  I'm having difficulty finding where the ARM/AT91 code
enables interrupts.  Does anyone know?  I'm sure I've commented the code
responsible for this but I can't find it.

Thanks,

Nathan French


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