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RE: cortex a9 SMP spinlock
- From: "Christophe Coutand" <ccoutand at stmi dot com>
- To: "Fan Chongbin-B32609" <B32609 at freescale dot com>, <ecos-discuss at ecos dot sourceware dot org>
- Date: Tue, 1 Feb 2011 00:45:05 -0800
- Subject: RE: [ECOS] cortex a9 SMP spinlock
- References: <2214152271E68943912B2BA31446CCBF0A0F8C@039-SN1MPN1-006.039d.mgd.msft.net> <D6050C555CC56940A7AF32652283027603A358A5@mail2.STMIRV01.COM> <2214152271E68943912B2BA31446CCBF0A0FD0@039-SN1MPN1-006.039d.mgd.msft.net>, <D6050C555CC56940A7AF32652283027603A35972@mail2.STMIRV01.COM> <2214152271E68943912B2BA31446CCBF0A2F70@039-SN1MPN1-001.039d.mgd.msft.net>
Hi Jerry,
I see it now, strexeq returns 0 if the operation succeed and 1 if it fails so your current implementation should work.
Christophe
-----Original Message-----
From: Fan Chongbin-B32609 [mailto:B32609@freescale.com]
Sent: 1. februar 2011 07:15
To: Christophe Coutand; ecos-discuss@ecos.sourceware.org
Subject: 答复: [ECOS] cortex a9 SMP spinlock
Hi,Christophe
For HAL_TAS_SET( _tas_, _oldb_ ), the "strexeq %0,r1,[%1]\n" will save the store operation's state(failed or succeeded) to register %0(i.e. _oldb_).
For HAL_TAS_CLEAR( _tas_, _oldb_ ), because the processor owned the spinlock can process this marco, so the store operation will succeed certainly.So, no need to check the store operation state.
what's your opinion?
BR
Jerry
________________________________________
发件人: Christophe Coutand [ccoutand@stmi.com]
发送时间: 2011年1月31日 16:44
收件人: Fan Chongbin-B32609; ecos-discuss@ecos.sourceware.org
主题: RE: [ECOS] cortex a9 SMP spinlock
You must make sure that your store operation has succeeded. It applies for both the set and clear.
Christophe
-----Original Message-----
From: Fan Chongbin-B32609 [mailto:B32609@freescale.com]
Sent: 31. januar 2011 06:12
To: Christophe Coutand; ecos-discuss@ecos.sourceware.org
Subject: RE: [ECOS] cortex a9 SMP spinlock
My implementation:
#define HAL_TAS_SET( _tas_, _oldb_ ) \
CYG_MACRO_START \
{ \
register CYG_WORD32 __old; \
register CYG_WORD32 __tas = &_tas_; \
__asm__ volatile ( \
"mov r1,#1\n" \
"ldrex r0,[%1]\n" \
"cmp r0,#0" \
"strexeq %0,r1,[%1]\n" \
: "=r" (__old), "=r" (__tas), \
: \
: "memory","r1","r0" \
); \
_oldb_ = ( __old & 1 ) != 0; \
} \
CYG_MACRO_END
#define HAL_TAS_CLEAR( _tas_, _oldb_ ) \
CYG_MACRO_START \
{ \
register CYG_WORD32 __tas = &_tas_; \
__asm__ volatile ( \
" mov r1,#0\n" \
" str r1,[%0]\n" \
" dsb\n" \
: "=r" (__tas) \
: \
: "memory","r1" \
); \
} \
CYG_MACRO_END
Because of the lack of the real target board, I did not know it worked or not. So, guys, give me some advice.
BR
Jerry
-----Original Message-----
From: Christophe Coutand [mailto:ccoutand@stmi.com]
Sent: 2011年1月30日 17:57
To: Fan Chongbin-B32609; ecos-discuss@ecos.sourceware.org
Subject: RE: [ECOS] cortex a9 SMP spinlock
You can find some inputs here:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489b/Cih
bghef.html
Christophe
-----Original Message-----
From: ecos-discuss-owner@ecos.sourceware.org
[mailto:ecos-discuss-owner@ecos.sourceware.org] On Behalf Of Fan
Chongbin-B32609
Sent: 30. januar 2011 10:31
To: ecos-discuss@ecos.sourceware.org
Subject: [ECOS] cortex a9 SMP spinlock
Hi, all
For cortex-a9 SMP, how to implement HAL_TAS_SET(_tas, _oldb_) macro?
BR
Jerry
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